| author | Walter Fetter Lages <w.fetter@ieee.org> | |
| Tue, 22 May 2018 17:50:59 +0000 (14:50 -0300) | ||
| committer | Walter Fetter Lages <w.fetter@ieee.org> | |
| Tue, 22 May 2018 17:50:59 +0000 (14:50 -0300) | ||
| commit | 29b52ba1669457df425048aee6d44c2b6c4e4c38 | |
| tree | e2b3c1a1d7314135375d9845a568e75f13de66d4 | tree | snapshot |
| parent | 69c931346d931be7d6ac53810dadaae46d086da8 | commit | diff |
| doc/aic.back.gbr | [new file with mode: 0644] | blob |
| doc/aic.backmask.gbr | [new file with mode: 0644] | blob |
| doc/aic.fab.gbr | [new file with mode: 0644] | blob |
| doc/aic.front.gbr | [new file with mode: 0644] | blob |
| doc/aic.frontmask.gbr | [new file with mode: 0644] | blob |
| doc/aic.frontsilk.gbr | [new file with mode: 0644] | blob |
| doc/aic.pcb | diff | blob | history | |
| doc/aic.plated-drill.cnc | [new file with mode: 0644] | blob |
| doc/aicpower.sch | diff | blob | history | |
| doc/attribs | [new file with mode: 0644] | blob |
| doc/gafrc | [new file with mode: 0755] | blob |
| doc/sym/dsPIC30F4012-P-1.sym | [new file with mode: 0644] | blob |
| doc/sym/max5062esoic8-1.sym | [new file with mode: 0644] | blob |