From: Walter Fetter Lages <w.fetter@ieee.org>
Date: Sun, 20 May 2018 03:00:10 +0000 (-0300)
Subject: Initial commit.
X-Git-Tag: v1.0.0^0
X-Git-Url: http://git.ece.ufrgs.br/?a=commitdiff_plain;h=36edcc438bbb444668ccb2ee005b7b5cf2a2f205;p=aic.git

Initial commit.

aic-1.0.0 based on TINI.
---

36edcc438bbb444668ccb2ee005b7b5cf2a2f205
diff --git a/.gitignore b/.gitignore
new file mode 100644
index 0000000..c77d130
--- /dev/null
+++ b/.gitignore
@@ -0,0 +1,311 @@
+# Project specific
+# TINI executable
+*.tini
+
+# Text editor
+# Backup files
+*.~
+*.bak
+
+# C++
+# Prerequisites
+*.d
+
+# Compiled Object files
+*.slo
+*.lo
+*.o
+*.obj
+
+# Precompiled Headers
+*.gch
+*.pch
+
+# Compiled Dynamic libraries
+*.so
+*.dylib
+*.dll
+
+# Fortran module files
+*.mod
+*.smod
+
+# Compiled Static libraries
+*.lai
+*.la
+*.a
+*.lib
+
+# Executables
+*.exe
+*.out
+*.app
+
+# Java
+# Compiled class file
+*.class
+
+# Log file
+*.log
+
+# BlueJ files
+*.ctxt
+
+# Mobile Tools for Java (J2ME)
+.mtj.tmp/
+
+# Package Files #
+*.jar
+*.war
+*.nar
+*.ear
+*.zip
+*.tar.gz
+*.rar
+
+# virtual machine crash logs, see http://www.java.com/en/download/help/error_hotspot.xml
+hs_err_pid*
+
+#TeX
+## Core latex/pdflatex auxiliary files:
+*.aux
+*.lof
+*.log
+*.lot
+*.fls
+*.out
+*.toc
+*.fmt
+*.fot
+*.cb
+*.cb2
+.*.lb
+
+## Intermediate documents:
+*.dvi
+*.xdv
+*-converted-to.*
+
+## Generated if empty string is given at "Please type another file name for output:"
+.pdf
+
+## Bibliography auxiliary files (bibtex/biblatex/biber):
+*.bbl
+*.bcf
+*.blg
+*-blx.aux
+*-blx.bib
+*.run.xml
+
+## Build tool auxiliary files:
+*.fdb_latexmk
+*.synctex
+*.synctex(busy)
+*.synctex.gz
+*.synctex.gz(busy)
+*.pdfsync
+
+## Build tool directories for auxiliary files
+# latexrun
+latex.out/
+
+## Auxiliary and intermediate files from other packages:
+# algorithms
+*.alg
+*.loa
+
+# achemso
+acs-*.bib
+
+# amsthm
+*.thm
+
+# beamer
+*.nav
+*.pre
+*.snm
+*.vrb
+
+# changes
+*.soc
+
+# cprotect
+*.cpt
+
+# elsarticle (documentclass of Elsevier journals)
+*.spl
+
+# endnotes
+*.ent
+
+# fixme
+*.lox
+
+# feynmf/feynmp
+*.mf
+*.mp
+*.t[1-9]
+*.t[1-9][0-9]
+*.tfm
+
+#(r)(e)ledmac/(r)(e)ledpar
+*.end
+*.?end
+*.[1-9]
+*.[1-9][0-9]
+*.[1-9][0-9][0-9]
+*.[1-9]R
+*.[1-9][0-9]R
+*.[1-9][0-9][0-9]R
+*.eledsec[1-9]
+*.eledsec[1-9]R
+*.eledsec[1-9][0-9]
+*.eledsec[1-9][0-9]R
+*.eledsec[1-9][0-9][0-9]
+*.eledsec[1-9][0-9][0-9]R
+
+# glossaries
+*.acn
+*.acr
+*.glg
+*.glo
+*.gls
+*.glsdefs
+
+# gnuplottex
+*-gnuplottex-*
+
+# gregoriotex
+*.gaux
+*.gtex
+
+# htlatex
+*.4ct
+*.4tc
+*.idv
+*.lg
+*.trc
+*.xref
+
+# hyperref
+*.brf
+
+# knitr
+*-concordance.tex
+# TODO Comment the next line if you want to keep your tikz graphics files
+*.tikz
+*-tikzDictionary
+
+# listings
+*.lol
+
+# makeidx
+*.idx
+*.ilg
+*.ind
+*.ist
+
+# minitoc
+*.maf
+*.mlf
+*.mlt
+*.mtc[0-9]*
+*.slf[0-9]*
+*.slt[0-9]*
+*.stc[0-9]*
+
+# minted
+_minted*
+*.pyg
+
+# morewrites
+*.mw
+
+# nomencl
+*.nlg
+*.nlo
+*.nls
+
+# pax
+*.pax
+
+# pdfpcnotes
+*.pdfpc
+
+# sagetex
+*.sagetex.sage
+*.sagetex.py
+*.sagetex.scmd
+
+# scrwfile
+*.wrt
+
+# sympy
+*.sout
+*.sympy
+sympy-plots-for-*.tex/
+
+# pdfcomment
+*.upa
+*.upb
+
+# pythontex
+*.pytxcode
+pythontex-files-*/
+
+# thmtools
+*.loe
+
+# TikZ & PGF
+*.dpth
+*.md5
+*.auxlock
+
+# todonotes
+*.tdo
+
+# easy-todo
+*.lod
+
+# xmpincl
+*.xmpi
+
+# xindy
+*.xdy
+
+# xypic precompiled matrices
+*.xyc
+
+# endfloat
+*.ttt
+*.fff
+
+# Latexian
+TSWLatexianTemp*
+
+## Editors:
+# WinEdt
+*.bak
+*.sav
+
+# Texpad
+.texpadtmp
+
+# Kile
+*.backup
+
+# KBibTeX
+*~[0-9]*
+
+# auto folder when using emacs and auctex
+./auto/*
+*.el
+
+# expex forward references with \gathertags
+*-tags.tex
+
+# standalone packages
+*.sta
+
+# generated if using elsarticle.cls
+*.spl
diff --git a/BrakeTest/BrakeTest.java b/BrakeTest/BrakeTest.java
new file mode 100644
index 0000000..a978e82
--- /dev/null
+++ b/BrakeTest/BrakeTest.java
@@ -0,0 +1,50 @@
+import br.ufrgs.eletro.AIC.*;
+import com.dalsemi.system.*;
+import java.io.*;
+import java.lang.Math.*;
+
+class BrakeTest
+{
+	static final int BASE=0x800000;
+	static final int ST=1000;
+
+	static AIC aic;
+
+	private static void delay(int ms)
+	{
+		long time=TINIOS.uptimeMillis();
+		while(TINIOS.uptimeMillis() < time+ms);
+	}
+
+	public static void main(String[] args) throws IOException
+	{
+		int i;
+		boolean run=true;
+
+		System.out.println("AIC Brake Test Program");
+		System.out.println("Copyright (C) Walter Fetter Lages, 2002.\n");
+
+		try
+		{
+			aic=new AIC(BASE,24.0,20e3,2000);
+
+			aic.on();
+
+			while(run)
+			{
+				aic.brake.release();
+				System.out.println("Brake released");
+				delay(ST);
+				aic.brake.apply();
+				System.out.println("Brake applied");
+				delay(ST);	
+			}
+			aic.off();
+		}
+		catch (IllegalAddressException iae)
+		{
+			iae.printStackTrace();
+		}
+
+	}
+}
diff --git a/BrakeTest/Makefile b/BrakeTest/Makefile
new file mode 100644
index 0000000..7442771
--- /dev/null
+++ b/BrakeTest/Makefile
@@ -0,0 +1,19 @@
+CLASSPATH=-classpath /opt/tini/bin/tini.jar:/opt/tini/bin/tiniclasses.jar:../lib/AIC.jar
+APIDBPATH=-d /opt/tini/bin/tini.db
+LIBPATH=-path ../lib/AIC.jar
+JAVAFLAGS=-O -target 1.1
+
+all: BrakeTest.tini
+
+BrakeTest.class: BrakeTest.java
+	javac ${JAVAFLAGS} ${CLASSPATH} BrakeTest.java
+
+BrakeTest.tini: BrakeTest.class
+	java ${CLASSPATH} TINIConvertor -f BrakeTest.class ${APIDBPATH} -o BrakeTest.tini ${LIBPATH}
+
+clean:
+	rm -f *.bak *~ BrakeTest.class
+
+distclean: clean
+	rm -f BrakeTest.tini
+
diff --git a/EncoderTest/EncoderTest.java b/EncoderTest/EncoderTest.java
new file mode 100644
index 0000000..07797f3
--- /dev/null
+++ b/EncoderTest/EncoderTest.java
@@ -0,0 +1,65 @@
+import br.ufrgs.eletro.AIC.*;
+import com.dalsemi.system.*;
+import java.io.*;
+import java.lang.Math.*;
+
+class EncoderTest
+{
+	static final int BASE=0x800000;
+	static final int ST=1500;
+
+	static AIC aic;
+
+	private static void delay(int ms)
+	{
+		long time=TINIOS.uptimeMillis();
+		while(TINIOS.uptimeMillis() < time+ms);
+	}
+
+	static void iter(int i) throws IllegalAddressException
+	{
+		aic.motor.set(10);
+		System.out.print("Motor Voltage: " + i);
+
+		int count=aic.encoder.read();
+		aic.encoder.clear();
+		System.out.print("\tEncocer count:  " + count);
+		System.out.println("\tMotor speed:  " + (2*java.lang.Math.PI*count/aic.encoder.PULSES/ST*1000));
+		delay(ST);
+	}
+	
+	public static void main(String[] args) throws IOException
+	{
+		int i;
+		boolean run=true;
+
+		System.out.println("AIC Encoder Test Program");
+		System.out.println("Copyright (C) Walter Fetter Lages, 2002.\n");
+
+		try
+		{
+			aic=new AIC(BASE,24.0,20e3,2000);
+
+			aic.on();
+
+			aic.brake.release();
+
+			for(i=0;(i <= 24) && run;i++) iter(i);
+
+			while(run)
+			{
+
+				for(i=-24;(i <= 24) && run;i++) iter(i);
+				for(i=24;(i >= -24) && run;i--) iter(i);
+			}
+
+			aic.off();
+
+		}
+		catch (IllegalAddressException iae)
+		{
+			iae.printStackTrace();
+		}
+
+	}
+}
diff --git a/EncoderTest/Makefile b/EncoderTest/Makefile
new file mode 100644
index 0000000..8dd350b
--- /dev/null
+++ b/EncoderTest/Makefile
@@ -0,0 +1,19 @@
+CLASSPATH=-classpath /opt/tini/bin/tini.jar:/opt/tini/bin/tiniclasses.jar:../lib/AIC.jar
+APIDBPATH=-d /opt/tini/bin/tini.db
+LIBPATH=-path ../lib/AIC.jar
+JAVAFLAGS=-O -target 1.1
+
+all: EncoderTest.tini
+
+EncoderTest.class: EncoderTest.java
+	javac ${JAVAFLAGS} ${CLASSPATH} EncoderTest.java
+
+EncoderTest.tini: EncoderTest.class
+	java ${CLASSPATH} TINIConvertor -f EncoderTest.class ${APIDBPATH} -o EncoderTest.tini ${LIBPATH}
+
+clean:
+	rm -f *.bak *~ EncoderTest.class
+
+distclean: clean
+	rm -f EncoderTest.tini
+
diff --git a/INSTALL b/INSTALL
new file mode 100644
index 0000000..6837ea9
--- /dev/null
+++ b/INSTALL
@@ -0,0 +1,4 @@
+Instalar o software da AIC:
+
+<http://www.ece.ufrgs.br/~fetter/pub/aic-x.y.z.tgz>: descompactar no
+diretorio do usuario:
diff --git a/IndexTest/IndexTest.java b/IndexTest/IndexTest.java
new file mode 100644
index 0000000..828fb2c
--- /dev/null
+++ b/IndexTest/IndexTest.java
@@ -0,0 +1,46 @@
+import br.ufrgs.eletro.AIC.*;
+import com.dalsemi.system.*;
+import java.io.*;
+import java.lang.Math.*;
+
+class IndexTest
+{
+	static final int BASE=0x800000;
+	static final int ST=500;
+
+	static AIC aic;
+
+	private static void delay(int ms)
+	{
+		long time=TINIOS.uptimeMillis();
+		while(TINIOS.uptimeMillis() < time+ms);
+	}
+
+	public static void main(String[] args) throws IOException
+	{
+		int i;
+		boolean run=true;
+
+		System.out.println("AIC Index Test Program");
+		System.out.println("Copyright (C) Walter Fetter Lages, 2002.\n");
+
+		try
+		{
+			aic=new AIC(BASE,24.0,20e3,2000);
+
+			aic.on();
+
+			while(run)
+			{
+				System.out.println("Index=" + aic.index.read());
+				delay(ST);
+			}
+			aic.off();
+		}
+		catch (IllegalAddressException iae)
+		{
+			iae.printStackTrace();
+		}
+
+	}
+}
diff --git a/IndexTest/Makefile b/IndexTest/Makefile
new file mode 100644
index 0000000..0cdab09
--- /dev/null
+++ b/IndexTest/Makefile
@@ -0,0 +1,19 @@
+CLASSPATH=-classpath /opt/tini/bin/tini.jar:/opt/tini/bin/tiniclasses.jar:../lib/AIC.jar
+APIDBPATH=-d /opt/tini/bin/tini.db
+LIBPATH=-path ../lib/AIC.jar
+JAVAFLAGS=-O -target 1.1
+
+all: IndexTest.tini
+
+IndexTest.class: IndexTest.java
+	javac ${JAVAFLAGS} ${CLASSPATH} IndexTest.java
+
+IndexTest.tini: IndexTest.class
+	java ${CLASSPATH} TINIConvertor -f IndexTest.class ${APIDBPATH} -o IndexTest.tini ${LIBPATH}
+
+clean:
+	rm -f *.bak *~ IndexTest.class
+
+distclean: clean
+	rm -f IndexTest.tini
+
diff --git a/JointTest/JointTest.java b/JointTest/JointTest.java
new file mode 100644
index 0000000..68a828e
--- /dev/null
+++ b/JointTest/JointTest.java
@@ -0,0 +1,55 @@
+import br.ufrgs.eletro.AIC.*;
+import com.dalsemi.system.*;
+import java.io.*;
+import java.lang.Math.*;
+
+class JointTest
+{
+	static final int BASE=0x800000;
+
+	static AIC aic;
+
+	private static void delay(int ms)
+	{
+		long time=TINIOS.uptimeMillis();
+		while(TINIOS.uptimeMillis() < time+ms);
+	}
+
+	static void iter(double v,int ms) throws IllegalAddressException
+	{
+		aic.motor.set(v);
+		System.out.print("Motor Voltage: " + v);
+		System.out.println("\tIndex: " + aic.index.read());
+
+		delay(ms);
+	}
+	
+	public static void main(String[] args) throws IOException
+	{
+		int i;
+
+		System.out.println("AIC Joint Test Program");
+		System.out.println("Copyright (C) Walter Fetter Lages, 2002.\n");
+
+		try
+		{
+			aic=new AIC(BASE,24.0,20e3,2000);
+
+			aic.on();
+
+			aic.brake.release();
+
+			while(!aic.index.read())
+			{
+				iter(5,1000);
+				iter(-5,1000);
+			}
+			aic.off();
+		}
+		catch (IllegalAddressException iae)
+		{
+			iae.printStackTrace();
+		}
+
+	}
+}
diff --git a/JointTest/Makefile b/JointTest/Makefile
new file mode 100644
index 0000000..2ec6ab2
--- /dev/null
+++ b/JointTest/Makefile
@@ -0,0 +1,19 @@
+CLASSPATH=-classpath /opt/tini/bin/tini.jar:/opt/tini/bin/tiniclasses.jar:../lib/AIC.jar
+APIDBPATH=-d /opt/tini/bin/tini.db
+LIBPATH=-path ../lib/AIC.jar
+JAVAFLAGS=-O -target 1.1
+
+all: JointTest.tini
+
+JointTest.class: JointTest.java
+	javac ${JAVAFLAGS} ${CLASSPATH} JointTest.java
+
+JointTest.tini: JointTest.class
+	java ${CLASSPATH} TINIConvertor -f JointTest.class ${APIDBPATH} -o JointTest.tini ${LIBPATH}
+
+clean:
+	rm -f *.bak *~ JointTest.class
+
+distclean: clean
+	rm -f JointTest.tini
+
diff --git a/MotorReset/Makefile b/MotorReset/Makefile
new file mode 100644
index 0000000..4846e30
--- /dev/null
+++ b/MotorReset/Makefile
@@ -0,0 +1,19 @@
+CLASSPATH=-classpath /opt/tini/bin/tini.jar:/opt/tini/bin/tiniclasses.jar:../lib/AIC.jar
+APIDBPATH=-d /opt/tini/bin/tini.db
+LIBPATH=-path ../lib/AIC.jar
+JAVAFLAGS=-O -target 1.1
+
+all: MotorReset.tini
+
+MotorReset.class: MotorReset.java
+	javac ${JAVAFLAGS} ${CLASSPATH} MotorReset.java
+
+MotorReset.tini: MotorReset.class
+	java ${CLASSPATH} TINIConvertor -f MotorReset.class ${APIDBPATH} -o MotorReset.tini ${LIBPATH}
+
+clean:
+	rm -f *.bak *~ MotorReset.class
+
+distclean: clean
+	rm -f MotorReset.tini
+
diff --git a/MotorReset/MotorReset.java b/MotorReset/MotorReset.java
new file mode 100644
index 0000000..dddf45c
--- /dev/null
+++ b/MotorReset/MotorReset.java
@@ -0,0 +1,56 @@
+import br.ufrgs.eletro.AIC.*;
+import com.dalsemi.system.*;
+import java.io.*;
+import java.lang.Math.*;
+
+class MotorReset
+{
+	static final int BASE=0x800000;
+
+	static AIC aic;
+
+	private static void delay(int ms)
+	{
+		long time=TINIOS.uptimeMillis();
+		while(TINIOS.uptimeMillis() < time+ms);
+	}
+
+	static void iter(double v,int ms) throws IllegalAddressException
+	{
+		aic.motor.set(v);
+		System.out.print("Motor Voltage: " + v);
+		System.out.println("\tIndex: " + aic.index.read());
+
+		delay(ms);
+	}
+	
+	public static void main(String[] args) throws IOException
+	{
+
+		System.out.println("AIC Joint Test Program");
+		System.out.println("Copyright (C) Walter Fetter Lages, 2002.\n");
+
+		try
+		{
+			aic=new AIC(BASE,24.0,20e3,2000);
+
+			aic.on();
+
+			aic.brake.release();
+		
+			double v=0;
+
+			while(!aic.index.read())
+			{
+				if(v < 24.0) v++;
+				iter(v,1000);
+			}
+			aic.off();
+		}
+		catch (IllegalAddressException iae)
+		{
+			iae.printStackTrace();
+		}
+
+	}
+}
diff --git a/MotorTest/Makefile b/MotorTest/Makefile
new file mode 100644
index 0000000..8e55ca4
--- /dev/null
+++ b/MotorTest/Makefile
@@ -0,0 +1,19 @@
+CLASSPATH=-classpath /opt/tini/bin/tini.jar:/opt/tini/bin/tiniclasses.jar:../lib/AIC.jar
+APIDBPATH=-d /opt/tini/bin/tini.db
+LIBPATH=-path ../lib/AIC.jar
+JAVAFLAGS=-O -target 1.1
+
+all: MotorTest.tini
+
+MotorTest.class: MotorTest.java
+	javac ${JAVAFLAGS} ${CLASSPATH} MotorTest.java
+
+MotorTest.tini: MotorTest.class
+	java ${CLASSPATH} TINIConvertor -f MotorTest.class ${APIDBPATH} -o MotorTest.tini ${LIBPATH}
+
+clean:
+	rm -f *.bak *~ MotorTest.class
+
+distclean: clean
+	rm -f MotorTest.tini
+
diff --git a/MotorTest/MotorTest.java b/MotorTest/MotorTest.java
new file mode 100644
index 0000000..09a5bf2
--- /dev/null
+++ b/MotorTest/MotorTest.java
@@ -0,0 +1,58 @@
+import br.ufrgs.eletro.AIC.*;
+import com.dalsemi.system.*;
+import java.io.*;
+import java.lang.Math.*;
+
+class MotorTest
+{
+	static final int BASE=0x800000;
+	static final int ST=100;
+
+	static AIC aic;
+
+	private static void delay(int ms)
+	{
+		long time=TINIOS.uptimeMillis();
+		while(TINIOS.uptimeMillis() < time+ms);
+	}
+
+	static void iter(int i) throws IllegalAddressException
+	{
+		aic.motor.set(i);
+		System.out.println("Motor Voltage: " + i);
+
+		delay(ST);
+	}
+	
+	public static void main(String[] args) throws IOException
+	{
+		int i;
+		boolean run=true;
+
+		System.out.println("AIC Motor Test Program");
+		System.out.println("Copyright (C) Walter Fetter Lages, 2002.\n");
+
+		try
+		{
+			aic=new AIC(BASE,24.0,20e3,2000);
+
+			aic.on();
+
+			aic.brake.release();
+
+			for(i=0;(i <= 24) && run;i++) iter(i);
+
+			while(run)
+			{
+				for(i=24;(i >= -24) && run;i--) iter(i);
+				for(i=-24;(i <= 24) && run;i++) iter(i);
+			}
+			aic.off();
+		}
+		catch (IllegalAddressException iae)
+		{
+			iae.printStackTrace();
+		}
+
+	}
+}
diff --git a/README b/README
new file mode 100644
index 0000000..9b1dc6b
--- /dev/null
+++ b/README
@@ -0,0 +1,3 @@
+		Actuator Interface Card
+
+aic-1.*.*		based on TINI
diff --git a/StrobeTest/Makefile b/StrobeTest/Makefile
new file mode 100644
index 0000000..13f0708
--- /dev/null
+++ b/StrobeTest/Makefile
@@ -0,0 +1,18 @@
+CLASSPATH=-classpath /opt/tini/bin/tini.jar:/opt/tini/bin/tiniclasses.jar
+APIDBPATH=-d /opt/tini/bin/tini.db
+JAVAFLAGS=-O -target 1.1
+
+all: StrobeTest.tini
+
+StrobeTest.class: StrobeTest.java
+	javac ${JAVAFLAGS} ${CLASSPATH} StrobeTest.java
+
+StrobeTest.tini: StrobeTest.class
+	java ${CLASSPATH} TINIConvertor -f StrobeTest.class ${APIDBPATH} -o StrobeTest.tini
+
+clean:
+	rm -f *.bak *~ StrobeTest.class
+
+distclean: clean
+	rm -f StrobeTest.tini
+
diff --git a/StrobeTest/StrobeTest.java b/StrobeTest/StrobeTest.java
new file mode 100644
index 0000000..982b76b
--- /dev/null
+++ b/StrobeTest/StrobeTest.java
@@ -0,0 +1,48 @@
+import com.dalsemi.system.DataPort;
+import com.dalsemi.system.IllegalAddressException;
+
+class StrobeTest
+{
+	static final int BASE = 0x800000;
+	static final int PWM = BASE+0x80000;
+	static final int ENCODER = BASE+0x90000;
+	static final int CONTROL = BASE+0xa0000;
+	
+	public static void main(String[] args)
+	{
+		DataPort pwm = new DataPort(PWM);
+		DataPort encoder = new DataPort(ENCODER);
+		DataPort control = new DataPort(CONTROL);
+
+		pwm.setFIFOMode(true);
+		encoder.setFIFOMode(true);
+		control.setFIFOMode(true);
+
+		pwm.setStretchCycles(DataPort.STRETCH10);
+		encoder.setStretchCycles(DataPort.STRETCH10);
+		control.setStretchCycles(DataPort.STRETCH10);
+
+		try 
+		{
+			int data=0;
+
+			for(;;)
+			{
+	
+				pwm.write(data);
+				encoder.write(data);
+				control.write(data);
+				data=~data;
+				
+				pwm.read();
+				encoder.read();
+				control.read();
+				
+			}
+		} 
+		catch (IllegalAddressException iae)
+		{
+			iae.printStackTrace();
+		}
+	}
+}
diff --git a/doc/Makefile b/doc/Makefile
new file mode 100644
index 0000000..22960e8
--- /dev/null
+++ b/doc/Makefile
@@ -0,0 +1,49 @@
+SCHEMS=aictini.sch aicpower.sch
+
+all: doc pcb bom
+
+doc: aic.ps aic.pdf
+
+aic.ps: aic.dvi
+	dvips aic
+
+aic.pdf: aic.dvi
+	dvipdf aic
+
+aic.dvi: aic.tex aic.aux aic.bbl
+	latex aic
+	latex aic
+
+aic.aux: aic.tex
+	latex aic
+
+aic.bbl: aic.bib
+	bibtex aic
+
+pcb: aic.net #aic.pcb
+
+aic.net: $(SCHEMS)
+	gnetlist -g PCB -o aic.net $(SCHEMS)
+
+#aic.pcb: $(SCHEMS)
+#	gnetlist -g PCBboard -o aic.pcb $(SCHEMS)
+
+bom: aic.bom aic.bpp aic.xrf
+
+aic.bom: $(SCHEMS) attribs
+	gnetlist -g bom -o aic.bom $(SCHEMS)
+
+aic.bpp: aic.bom
+	bompp.sh aic.bom > aic.bpp
+
+aic.xrf: aic.bom
+	bom_xref.sh aic.bom > aic.xrf
+
+clean:
+	rm -f *.aux *.log *~ *.bak *.bbl *.blg *.old
+
+distclean: clean
+	rm -f aic.ps aic.pdf aic.dvi aic.net aic.bom aic.bpp aic.xrf
+
+update: $(SCHEMS)
+	gschupdate $(SCHEMS)
diff --git a/doc/aic.bib b/doc/aic.bib
new file mode 100644
index 0000000..43b2949
--- /dev/null
+++ b/doc/aic.bib
@@ -0,0 +1,44 @@
+@misc{ftpfs,
+title="{FTP} File System",
+note="http://ftpfs.sourceforge.net",
+key="FTP File System"}
+
+@misc{javasdk,
+title="{Java 2 SDK}, Standard Edition",
+note="http://java.sun.com/j2se/1.4",
+key="Java 2 {SDK}, Standard Edition"}
+
+@misc{javax.comm,
+title="{Java} extension for Communication ({Java} communications {API})",
+note="http://java.sun.com/products/javacomm",
+key="Java extension for Communication ({Java} communications {API})"}
+
+@misc{sdcc,
+title="{SDCC} - a Freeware, retargettable, optimizing {ANSI-C} compiler",
+note="http://sdcc.sourceforge.net",
+key="SDCC"}
+
+@misc{slush,
+title="{Slush}",
+note="docs/Slush.txt in ftp://ftp.dalsemi.com/pub/tini/tini1\underline{~}10.tgz",
+key="Slush"}
+
+@misc{rxtx,
+title="{RXTX}",
+note="http://www.rxtx.org",
+key="{RXTX}"}
+
+@misc{tinisdk,
+title="{TINI} Runtime Environment",
+note="ftp://ftp.dalsemi.com/pub/tini/tini1 \underline{~} 10.tgz",
+key="{TINI} Runtime Environment"}
+
+@book{tinispec,
+title="The {TINI} Specification and Developers Guide",
+author="Don Loomis",
+publisher="Addison-Wesley",
+address="Boston, MA",
+month="Jun",
+year="2001",
+note="http://www.ibutton.org/TINI/tinispec.pdf"}
+
diff --git a/doc/aic.tex b/doc/aic.tex
new file mode 100644
index 0000000..f01a179
--- /dev/null
+++ b/doc/aic.tex
@@ -0,0 +1,159 @@
+\documentclass[a4paper,12pt,brazil]{article}
+\usepackage{babel}
+\usepackage{epsf}
+\usepackage{float}
+
+\newcommand{\postscript}[2]
+{\setlength{\epsfxsize}{#2\hsize}
+\centerline{\epsfbox{#1}}}
+
+\renewcommand \thesection{\Roman{section}}
+
+\newtheorem{lemma}{Lema}
+\newtheorem{proof}{Prova}
+
+\title{
+{\large Universidade Federal do Rio Grande do Sul\\
+Escola de Engenharia\\
+Departamento de Engenharia El\'etrica}\\
+Actuator Interface Card}
+
+\author{Prof. Walter Fetter Lages}
+
+\begin{document}
+
+\maketitle
+
+
+\bibliographystyle{abbrv}
+
+\section{Introdu\c{c}\~ao}
+
+
+\section{Mapa de Endere\c{c}os}
+
+O espa\c{c}o de endere\c{c}amento da AIC \'e ocupado por dois conjuntos de
+dispositivos: os dispositivos existentes na pr\'opria TINI e os dispositivos
+externos.
+
+\subsection{Dispositivos da TINI}
+
+O mapa de endere\c{c}os da TINI \'e mostrado na tabela \ref{tab:addmap}.
+Note-se que o software da TINI apresenta para o usu\'ario uma mem\'oria
+linear\cite{tinispec}. Os endere\c{c}os habilitados atrav\'es de $\overline{\mbox{PCE0}}$,
+$\overline{\mbox{PCE1}}$, $\overline{\mbox{PCE2}}$ e
+$\overline{\mbox{PCE3}}$ s\~ao acessados no firmware da TINI atrav\'es das
+faixas 800000H-8FFFFFH, 900000H-9FFFFFH, A00000H-AFFFFFH e
+B00000H-BFFFFFH, respectivamente.
+
+\begin{table}[H]
+\caption{Mapa de Endere\c{c}os da TINI RevD}
+\label{tab:addmap}
+\begin{center}
+\begin{tabular}{ccccc}
+\hline \hline
+Endere\c{c}o & STROBE & Nome & Dispositivo & Refer\^encia\\
+\hline
+000000H - 0FFFFFH & $\overline{\mbox{RCE0}}$ & 512Kx8 FLASH & Flash Memory & U2\\
+100000H - 1FFFFFH & $\overline{\mbox{CE1}}$ & 512Kx8 SRAM & SRAM & U4\\
+200000H - 2FFFFFH & $\overline{\mbox{CE2}}$ & 512Kx8 SRAM & SRAM & U5\\
+300000H - 307FFFH & $\overline{\mbox{CE3}}$ & Ethernet Interface & SMC91C94/96 & U3\\
+308000H - 309FFFH & $\overline{\mbox{CE3}}$ \\
+310000H & $\overline{\mbox{CE3}}$ & Real Time Clock & DS1315 & U7\\
+310001H - 3FFFFFH & $\overline{\mbox{CE3}}$ \\
+000000H - 0FFFFFH & $\overline{\mbox{PCE0}}$\\
+100000H - 1FFFFFH & $\overline{\mbox{PCE1}}$ \\
+200000H - 2FFFFFH & $\overline{\mbox{PCE2}}$ \\
+300000H - 3FFFFFH & $\overline{\mbox{PCE3}}$ \\
+\hline
+\end{tabular}
+\end{center}
+\end{table}
+
+\subsection{Dispositivos Externos}
+
+Os dispositivos externos podem ser mapeados, atrav\'es de jumper, em
+qualquer dos espa\c{c}os de endere\c{c}amento selecionados por
+$\overline{\mbox{PCE0}}$-$\overline{\mbox{PCE3}}$. A tabela \ref{tab:extmap}
+mostra o mapeamento de endere\c{c}os dentro da faixa selecionada pelo
+jumper.
+
+\begin{table}[H]
+\caption{Mapa de Endere\c{c}os de Dispositivos Externos}
+\label{tab:extmap}
+\begin{center}
+\begin{tabular}{cccc}
+\hline \hline
+Endere\c{c}o &  Nome & Dispositivo & Refer\^encia\\
+\hline
+X80000H - X80003H & PWM & 8254 & U6\\
+X80004H - X8FFFFH & Alias PWM & 8254 & U6\\
+X90000H & Encoder & HCTL-2016 & U7\\
+X90001H - X9FFFFH & Alias Encoder & HCTL-2016 & U7\\
+XA0000H & Controle & 22V10 & U8\\
+XA0001H - XAFFFFH & Alias Controler & 22V10 & U8\\
+\hline
+\end{tabular}
+\end{center}
+\end{table}
+
+\subsection{Registrador de Controle}
+
+Este registrador (endere\c{c}o XA0000H)  \'e implementado em um 22V10 e os
+seus bits est\~ao descritos na tabela \ref{tab:ctrlreg}.
+
+\begin{table}[H]
+\caption{Registrador de Controle}
+\label{tab:ctrlreg}
+\begin{center}
+\begin{tabular}{ccl}
+\hline \hline
+Bit &  Opera\c{c}\~ao & Descri\c{c}\~ao\\
+\hline
+D0 & R & \'{\i}ndice\\
+\hline
+D1D0 & W\\
+00 & & Desabilita PWM\\
+01 & & Habilita PWM\\
+10 & & Ativa freio\\
+11 & & Libera freio\\
+\hline
+\end{tabular}
+\end{center}
+\end{table}
+
+\section{Actuator Interface Case}
+
+O gabinete de montagem da AIC possui os conectores de interface RS232, CAN e
+Ethernet no painel frontal e o conector de conex\~ao ao atuador no painel
+traseiro. A pinagem deste conector \'e detalhada na tabela
+\ref{tab:backpinout}.
+
+\begin{table}[H]
+\caption{Pinagem do Conector Traseiro}
+\label{tab:backpinout}
+\begin{center}
+\begin{tabular}{cl}
+\hline \hline
+Pino &  Sinal\\
+\hline
+1 & GND Encoder\\
+2 & CHA\\
+3 & +5V\\
+4 & CHB\\
+5 & GND \'Indice\\
+6 & \'Indice\\
+7 & +24V \'Indice\\
+8 & GND\\
+9 & +24V\\
+10 & Freio\\
+11 & Motor +\\
+12 & Motor -\\
+\hline
+\end{tabular}
+\end{center}
+\end{table}
+
+\bibliography{aic}
+
+\end{document}
diff --git a/doc/aic_comp_cut.png b/doc/aic_comp_cut.png
new file mode 100644
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diff --git a/doc/aic_solder_cut.png b/doc/aic_solder_cut.png
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diff --git a/doc/aic_wirewrap.png b/doc/aic_wirewrap.png
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diff --git a/doc/aicpcb.pdf b/doc/aicpcb.pdf
new file mode 100644
index 0000000..8fdcb54
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diff --git a/doc/aicpower.sch b/doc/aicpower.sch
new file mode 100644
index 0000000..27a44cc
--- /dev/null
+++ b/doc/aicpower.sch
@@ -0,0 +1,612 @@
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diff --git a/doc/aictini.sch b/doc/aictini.sch
new file mode 100644
index 0000000..df87eb0
--- /dev/null
+++ b/doc/aictini.sch
@@ -0,0 +1,760 @@
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+}
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+}
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+{
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+netname=A1
+}
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+{
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+netname=A0
+}
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+{
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+netname=A0
+}
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+N 12100 82900 18100 82900 4
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+{
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+netname=CLOCK
+}
+N 14500 82300 14500 82900 4
+N 21200 77400 23400 77400 4
+{
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+netname=/EXTINT
+}
+N 23400 77400 23400 75100 4
+N 7700 79500 6400 79500 4
+{
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+netname=/EXTINT
+}
+N 6400 79500 6400 75100 4
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+{
+T 12600 77500 5 10 1 1 0 0
+netname=/STROBE
+}
+N 19200 76800 16200 76800 4
+{
+T 18200 76800 5 10 1 1 0 0
+netname=/STROBE
+}
+N 16200 77500 16200 76800 4
+N 18400 86300 23600 86300 4
+{
+T 23400 86300 5 10 1 1 0 6
+netname=CLOCK
+}
+N 18400 86300 18400 85400 4
+N 15800 85400 18400 85400 4
+N 21200 78600 22800 78600 4
+{
+T 21300 78600 5 10 1 1 0 0
+netname=/EWR
+}
+N 15800 86500 22400 86500 4
+{
+T 16100 86500 5 10 1 1 0 0
+netname=/CSPWM
+}
+N 22800 85700 23600 85700 4
+{
+T 23400 85700 5 10 1 1 0 6
+netname=/EWR
+}
+N 22600 86000 23600 86000 4
+{
+T 23400 86000 5 10 1 1 0 6
+netname=/ERD
+}
+N 14900 77700 19200 77700 4
+{
+T 18500 77700 5 10 1 1 0 0
+netname=/RD
+}
+N 9800 76800 14900 76800 4
+{
+T 10100 76800 5 10 1 1 0 0
+netname=/RD
+}
+N 14500 78000 19200 78000 4
+{
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+}
+N 14500 78000 14500 76500 4
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+{
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+}
+N 15800 86800 17600 86800 4
+{
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+netname=/RD
+}
+N 15800 87100 17800 87100 4
+{
+T 16100 87100 5 10 1 1 0 0
+netname=/WR
+}
+T 20100 72400 9 10 1 0 0 0
+aictini.sch
+T 20300 72100 9 10 1 0 0 0
+1
+T 21700 72100 9 10 1 0 0 0
+2
+T 19800 72700 9 10 1 0 0 0
+Actuator Interface Card - CPU, PWM, Encoder, RS232 & Ethernet Interfaces
+N 18200 77400 18200 81100 4
+C 17200 84800 1 0 0 5V-plus-1.sym
+C 12500 84000 1 0 0 5V-plus-1.sym
+N 15800 87500 16100 87500 4
+N 13000 84200 13200 84200 4
+N 13000 84200 13000 84000 4
+N 13000 84000 12700 84000 4
+N 18200 81100 26300 81100 4
+N 26300 81100 26500 81300 4
+N 26300 78300 26500 78500 4
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+N 22600 86000 22600 78900 4
+N 22400 79200 22400 86500 4
+N 16600 83800 16600 76500 4
+N 16600 76500 19200 76500 4
+{
+T 18200 76500 5 10 1 1 0 0
+netname=PWM
+}
+N 16700 85100 16700 76200 4
+N 16700 76200 19200 76200 4
+{
+T 18200 76200 5 10 1 1 0 0
+netname=TRINT
+}
+N 17600 86800 17600 77700 4
+N 17800 87100 17800 78000 4
+N 14900 77700 14900 76800 4
+N 21000 85400 21600 85400 4
+N 21600 85400 21600 84500 4
+N 18100 85800 18300 86000 4
+N 18100 86100 18300 86300 4
+N 18500 86600 18300 86800 4
+T 23600 72400 9 10 1 0 0 0
+1.0.0
+C 12100 82000 1 0 0 osc-2.sym
+{
+T 12600 82700 5 10 1 1 0 0
+device=OSC
+T 12100 82700 5 10 1 1 0 0
+refdes=U11
+T 12300 81800 5 10 1 1 0 0
+value=10MHz
+}
+C 19200 75900 1 0 0 22V10-DIP-1.sym
+{
+T 19500 79900 5 10 1 1 0 0
+device=22V10
+T 19700 80100 5 10 1 1 0 6
+refdes=U8
+T 19200 75900 5 10 0 1 0 0
+value=GAL
+}
+T 21500 73200 9 10 1 0 0 0
+Universidade Federal do Rio Grande do Sul
+T 21700 73000 9 10 1 0 0 0
+Departamento de Engenharia Eletrica
+C 17800 77000 1 0 0 input-2.sym
+{
+T 18300 77100 5 10 1 1 0 7
+value=REFPOS
+T 17800 77000 5 10 0 1 0 0
+net=REFPOS:1
+}
+C 21200 77600 1 0 0 output-2.sym
+{
+T 22100 77700 5 10 1 1 0 1
+value=BRAKE
+T 21200 77600 5 10 0 1 0 0
+net=BRAKE:1
+}
+C 21200 77000 1 0 0 output-2.sym
+{
+T 22100 77100 5 10 1 1 0 1
+value=DRVA
+T 21200 77000 5 10 0 1 0 0
+net=DRVA:1
+}
+C 21200 76700 1 0 0 output-2.sym
+{
+T 22100 76800 5 10 1 1 0 1
+value=DRVB
+T 21200 76700 5 10 0 1 0 0
+net=DRVB:1
+}
+C 7700 86600 1 0 1 output-2.sym
+{
+T 6800 86700 5 10 1 1 0 7
+value=CAN0TX
+T 7700 86600 5 10 0 1 0 0
+net=CAN0TX:1
+}
+C 7700 85700 1 0 1 output-2.sym
+{
+T 6800 85800 5 10 1 1 0 7
+value=CAN1TX
+T 7700 85700 5 10 0 1 0 0
+net=CAN1TX:1
+}
+C 6300 86300 1 0 0 input-2.sym
+{
+T 6800 86400 5 10 1 1 0 7
+value=CAN0RX
+T 6300 86300 5 10 0 1 0 0
+net=CAN0RX:1
+}
+C 6300 85400 1 0 0 input-2.sym
+{
+T 6800 85500 5 10 1 1 0 7
+value=CAN1RX
+T 6300 85400 5 10 0 1 0 0
+net=CAN1RX:1
+}
+N 12300 74100 12400 74100 4
+N 12400 74100 12400 74300 4
+N 14000 74100 14800 74100 4
+T 23600 72100 9 9 1 0 0 0
+Walter Fetter Lages & Fernando Pessutto
+U 10700 88400 10700 85600 10 0
+U 12100 85400 12100 88400 10 0
+U 10700 85200 10700 79300 10 0
+U 18300 86900 18300 78400 10 0
+U 26500 88400 26500 78400 10 0
diff --git a/doc/attribs b/doc/attribs
new file mode 100644
index 0000000..bbe801d
--- /dev/null
+++ b/doc/attribs
@@ -0,0 +1,3 @@
+device
+value
+footprint
diff --git a/lib/AIC.java b/lib/AIC.java
new file mode 100644
index 0000000..eafa5a8
--- /dev/null
+++ b/lib/AIC.java
@@ -0,0 +1,38 @@
+package br.ufrgs.eletro.AIC;
+import com.dalsemi.system.IllegalAddressException;
+
+public class AIC
+{
+
+	public Motor motor;
+	public Encoder encoder;
+	public Brake brake;
+	public Index index;
+
+	public void on() throws IllegalAddressException
+	{
+		motor.on();
+		encoder.clear();
+	}
+
+	public void off() throws IllegalAddressException
+	{
+		motor.set(0);
+		motor.off();
+		encoder.clear();
+	}
+
+	public AIC(int base,double vm,double freq,int np) throws IllegalAddressException
+	{
+		motor=new Motor(base,vm,freq);
+		encoder=new Encoder(base,np);
+		brake=new Brake(base);
+		index=new Index(base);
+	}
+	
+	public void finalize() throws IllegalAddressException
+	{
+		off();
+	}
+
+}
diff --git a/lib/Brake.java b/lib/Brake.java
new file mode 100644
index 0000000..a53b484
--- /dev/null
+++ b/lib/Brake.java
@@ -0,0 +1,34 @@
+package br.ufrgs.eletro.AIC;
+
+import com.dalsemi.system.DataPort;
+import com.dalsemi.system.IllegalAddressException;
+
+public class Brake
+{
+	private static final int LATCH=0xA0000;
+	private static final int PWMDISABLE=0x00;
+	private static final int PWMENABLE=0x01;
+	private static final int BRAKEAPPLY=0x02;
+	private static final int BRAKERELEASE=0x03;
+
+	private DataPort latch;
+
+	public Brake(int base)
+	{
+		latch=new DataPort(base+LATCH);
+		latch.setFIFOMode(true);
+		latch.setStretchCycles(DataPort.STRETCH10);
+	}
+	
+	public void apply() throws IllegalAddressException
+	{
+		latch.write(BRAKEAPPLY);
+	}
+
+	public void release() throws IllegalAddressException
+	{
+		latch.write(BRAKERELEASE);
+	}
+}
+
+
diff --git a/lib/Encoder.java b/lib/Encoder.java
new file mode 100644
index 0000000..23e1de9
--- /dev/null
+++ b/lib/Encoder.java
@@ -0,0 +1,53 @@
+package br.ufrgs.eletro.AIC;
+
+import com.dalsemi.system.DataPort;
+import com.dalsemi.system.IllegalAddressException;
+
+public class Encoder
+{
+
+	public final int PULSES;
+
+	private static final int ENCODER=0x90000;
+	
+	private DataPort encPort;
+
+	public void clear() throws IllegalAddressException
+	{
+		encPort.write((byte)0);
+	}
+
+	public Encoder(int base,int pulses) throws IllegalAddressException
+	{
+		PULSES=pulses;
+
+		encPort=new DataPort(base+ENCODER);
+		encPort.setFIFOMode(true);
+		encPort.setStretchCycles(DataPort.STRETCH10);
+
+		clear();
+	}
+
+	public void finalize() throws IllegalAddressException
+	{
+		clear();
+	}
+
+	public int read() throws IllegalAddressException
+	{
+		int count;
+		byte[] hilo=new byte[2];
+		boolean FIFOMode;
+
+		FIFOMode=encPort.getFIFOMode();
+		encPort.setFIFOMode(false);
+		encPort.read(hilo,0,2);
+		encPort.setFIFOMode(FIFOMode);
+
+		count=(((int)hilo[0]) << 8) | (int)hilo[1];
+
+		return count;
+	}
+
+}
+
diff --git a/lib/Index.java b/lib/Index.java
new file mode 100644
index 0000000..a524846
--- /dev/null
+++ b/lib/Index.java
@@ -0,0 +1,24 @@
+package br.ufrgs.eletro.AIC;
+
+import com.dalsemi.system.DataPort;
+import com.dalsemi.system.IllegalAddressException;
+
+public class Index
+{
+	private static final int LATCH=0xA0000;
+
+	private DataPort latch;
+
+	public Index(int base) throws IllegalAddressException
+	{
+		latch=new DataPort(base+LATCH);
+		latch.setFIFOMode(true);
+		latch.setStretchCycles(DataPort.STRETCH10);
+	}
+
+	public boolean read() throws IllegalAddressException
+	{
+		if((latch.read() & 0x01) == 1) return true; else return false;
+	}
+
+}
diff --git a/lib/Makefile b/lib/Makefile
new file mode 100644
index 0000000..ea44d59
--- /dev/null
+++ b/lib/Makefile
@@ -0,0 +1,39 @@
+CLASSPATH=-classpath /opt/tini/bin/tini.jar:/opt/tini/bin/tiniclasses.jar:.
+APIDBPATH=-d /opt/tini/bin/tini.db
+PKGPATH=br/ufrgs/eletro/AIC
+JAVAFLAGS=-O -target 1.1
+
+all: AIC.jar
+
+${PKGPATH}/PWM.class: PWM.java 
+	javac ${JAVAFLAGS} ${CLASSPATH} -d . PWM.java
+
+${PKGPATH}/Motor.class: Motor.java ${PKGPATH}/PWM.class
+	javac ${JAVAFLAGS} ${CLASSPATH} -d . Motor.java
+
+${PKGPATH}/Encoder.class: Encoder.java
+	javac ${JAVAFLAGS} ${CLASSPATH} -d . Encoder.java
+
+${PKGPATH}/Brake.class: Brake.java
+	javac ${JAVAFLAGS} ${CLASSPATH} -d . Brake.java
+
+${PKGPATH}/Index.class: Index.java
+	javac ${JAVAFLAGS} ${CLASSPATH} -d . Index.java
+
+${PKGPATH}/AIC.class: AIC.java
+	javac ${JAVAFLAGS} ${CLASSPATH} -d . AIC.java
+
+AIC.jar: ${PKGPATH}/PWM.class\
+	${PKGPATH}/Motor.class\
+	${PKGPATH}/Encoder.class\
+	${PKGPATH}/Brake.class\
+	${PKGPATH}/Index.class\
+	${PKGPATH}/AIC.class
+	jar cf AIC.jar ${PKGPATH}
+
+clean:
+	rm -rf *.bak *~ br
+
+distclean: clean
+	rm -f AIC.jar
+
diff --git a/lib/Motor.java b/lib/Motor.java
new file mode 100644
index 0000000..7cf1cba
--- /dev/null
+++ b/lib/Motor.java
@@ -0,0 +1,49 @@
+package br.ufrgs.eletro.AIC;
+
+import com.dalsemi.system.IllegalAddressException;
+
+public class Motor
+{
+
+	private double volt;
+	private PWM pwm;
+
+	public Motor(int baseadd,double voltage,double freq) throws IllegalAddressException
+	{
+		volt=voltage;
+
+		pwm=new PWM(baseadd,freq);
+		pwm.off();
+	}
+
+	public Motor(int baseadd,double voltage) throws IllegalAddressException
+	{
+		volt=voltage;
+
+		pwm=new PWM(baseadd);
+		pwm.off();
+	}
+	
+	public void finalize() throws IllegalAddressException
+	{
+		pwm.off();
+	}	
+
+	public void on() throws IllegalAddressException
+	{
+		 pwm.on();
+	};
+	
+	public void off() throws IllegalAddressException
+	{ 
+		pwm.off();
+	 };
+	
+	public double set(double voltage) throws IllegalAddressException
+	{
+		double dutycicle=0.5*voltage/volt+0.5;
+		pwm.setDuty(dutycicle);
+		return dutycicle;
+	};
+};
+
diff --git a/lib/PWM.java b/lib/PWM.java
new file mode 100644
index 0000000..66a7217
--- /dev/null
+++ b/lib/PWM.java
@@ -0,0 +1,121 @@
+package br.ufrgs.eletro.AIC;
+
+import com.dalsemi.system.DataPort;
+import com.dalsemi.system.IllegalAddressException;
+
+public class PWM
+{
+	private static final int PWM=0x80000;
+	
+	private static final int LATCH=0xA0000;
+	private static final int PWMDISABLE=0x00;
+	private static final int PWMENABLE=0x01;
+	private static final int BRAKERELEASE=0x02;
+	private static final int BRAKEAPPLY=0x03;
+
+	
+	private static final int ONE_SHOT_BIN=0x32;	/* programmable one-shot binary */
+	private static final int RATE_BIN=0x34;   	/* rate generator binary */
+	
+	public static final double REF_FREQ=10e6;    /* reference frequency = 10 MHz */
+	public static final double SW_FREQ=20e3;     /* default switching frequency = 20 KHz */
+	public static final double TURNOFF_DELAY=600e-9;
+	public static final int MIN_COUNT=(int)(2*TURNOFF_DELAY*REF_FREQ);
+	public static final int MAX_COUNT=(int)(REF_FREQ/SW_FREQ);
+
+	private int max_count=MAX_COUNT;
+
+	private DataPort timer0;
+	private DataPort timer1;
+	private DataPort control;
+
+	private DataPort latch;
+
+	public void setFreq(double frequency) throws IllegalAddressException
+	{
+		max_count=(int)(REF_FREQ/frequency) & 0xffff;
+
+		control.write(RATE_BIN);
+		timer0.write((byte) max_count);
+		timer0.write((byte)(max_count >> 8));
+
+		control.write(0x40 | ONE_SHOT_BIN);
+		timer1.write((byte) (max_count/2));
+		timer1.write((byte)((max_count/2) >> 8));
+	}
+
+	public double getFreq()
+	{
+		return REF_FREQ/max_count;
+	}
+
+	private void init(int base,double freq) throws IllegalAddressException
+	{
+		timer0=new DataPort(base+PWM+0);
+		timer0.setFIFOMode(true);
+		timer0.setStretchCycles(DataPort.STRETCH10);
+
+		timer1=new DataPort(base+PWM+1);
+		timer1.setFIFOMode(true);
+		timer1.setStretchCycles(DataPort.STRETCH10);
+		
+		control=new DataPort(base+PWM+3);
+		control.setFIFOMode(true);
+		control.setStretchCycles(DataPort.STRETCH10);
+
+		latch=new DataPort(base+LATCH);
+		latch.setFIFOMode(true);
+		latch.setStretchCycles(DataPort.STRETCH10);
+
+
+		control.write(RATE_BIN);
+
+		timer0.write((byte) MAX_COUNT);
+		timer0.write((byte)(MAX_COUNT >> 8));
+
+		control.write(0x40 | ONE_SHOT_BIN);
+		timer1.write((byte)(max_count/2));
+		timer1.write((byte)((max_count/2) >> 8));
+
+		setFreq(freq);
+	}
+
+	public PWM(int base,double freq) throws IllegalAddressException
+	{
+		init(base,freq);
+	}
+
+	public PWM(int base) throws IllegalAddressException
+	{
+		init(base,SW_FREQ);
+	}
+
+	public void finalize() throws IllegalAddressException
+	{
+		timer1.write((byte)(max_count/2));
+		timer1.write((byte)((max_count/2) >> 8));
+	}
+
+
+	public int setDuty(double dutycicle) throws IllegalAddressException
+	{
+		if(dutycicle < 0.0) dutycicle=0.0;
+		if(dutycicle > 1.0) dutycicle=1.0;
+		int count=(int)(max_count*(1.0-dutycicle));
+		if(count < MIN_COUNT) count=MIN_COUNT;
+		if(count > max_count-MIN_COUNT) count=max_count-MIN_COUNT;
+		timer1.write((byte)count);
+		timer1.write((byte)(count >> 8));
+		return count;
+	}	
+
+	public void on() throws IllegalAddressException
+	{
+		latch.write((byte)PWMENABLE);
+	}
+
+	public void off() throws IllegalAddressException
+	{
+		latch.write((byte)PWMDISABLE);
+	}
+}
diff --git a/pld/decoder.EQN b/pld/decoder.EQN
new file mode 100644
index 0000000..a5dc4c4
--- /dev/null
+++ b/pld/decoder.EQN
@@ -0,0 +1,55 @@
+Groupings
+0:0:8;
+1:0:10;
+2:0:12;
+3:0:14;
+4:0:16;
+5:0:16;
+6:0:14;
+7:0:12;
+8:0:10;
+9:0:8;
+10:0:1;
+11:0:1;
+12:0:1;
+13:0:1;
+14:0:1;
+15:0:1;
+16:0:1;
+17:0:1;
+18:0:1;
+19:0:1;
+20:0:1;
+21:0:1;
+Declarations
+CLK,dir:input;
+A19,dir:input;
+A18,dir:input;
+A17,dir:input;
+A16,dir:input;
+!WR,dir:input;
+!RD,dir:input;
+D1,dir:input;
+REFPOS,dir:input;
+STROBE,dir:input;
+PWM,dir:input;
+TRINT,dir:input;
+DRVB,dir:input;
+DRVA,dir:input;
+EXTINT,dir:input;
+BRAKE,dir:input;
+PWMEN,dir:input;
+D0,dir:input;
+!EWR,dir:input;
+!ERD,dir:input;
+!CSPWM,dir:input;
+CSLATCH,dir:input;
+AR,dir:input;
+SP,dir:input;
+AR,dir:output,group:20;
+SP,dir:output,group:21;
+EXTINT,dir:output,group:7;
+Equations
+AR =0;
+SP =0;
+EXTINT=!TRINT;
diff --git a/pld/decoder.MAP b/pld/decoder.MAP
new file mode 100644
index 0000000..16fb244
--- /dev/null
+++ b/pld/decoder.MAP
@@ -0,0 +1,31 @@
+"Place Version: 2.8.2
+***********************
+*   DIP FORMAT ONLY   *
+***********************
+Actuator Interface Card Decoder 
+Part Number = PEEL22CV10
+
+PinNode 1 = CLK
+PinNode 2 = A19
+PinNode 3 = A18
+PinNode 4 = A17
+PinNode 5 = A16
+PinNode 6 = !WR
+PinNode 7 = !RD
+PinNode 8 = D1
+PinNode 9 = REFPOS
+PinNode 10 = STROBE
+PinNode 11 = PWM
+PinNode 13 = TRINT
+PinNode 14 = DRVB
+PinNode 15 = DRVA
+PinNode 16 = EXTINT
+PinNode 17 = BRAKE
+PinNode 18 = PWMEN
+PinNode 19 = D0
+PinNode 20 = !EWR
+PinNode 21 = !ERD
+PinNode 22 = !CSPWM
+PinNode 23 = CSLATCH
+PinNode 25 = AR
+PinNode 26 = SP
diff --git a/pld/decoder.hst b/pld/decoder.hst
new file mode 100644
index 0000000..b3f6c83
--- /dev/null
+++ b/pld/decoder.hst
@@ -0,0 +1,65 @@
+PALASM4  PLDSIM   - MARKET RELEASE 1.5 (7-10-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+PALASM SIMULATION HISTORY LISTING
+
+Title     : DECODER.PDS              Author   : Walter Fetter Lag
+Pattern   : A                        Company  : UFRGS            
+Revision  : 1.0                      Date     : 10/10/02         
+
+PAL22V10       
+Page : 1 
+           gggggggggggggggggggggggggggggggggggggggggggggggggggggggggggg
+ CLOCK     LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ A[19]     LLLLLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLH
+ A[18]     LLLLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHL
+ A[17]     LLLLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHL
+ A[16]     LLLLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHL
+/WR        LLLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLL
+/RD        LLLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLHHHHHHHHH
+ D1        LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ REFPOS    LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHHHHHHHHHHHH
+/STROBE    LLLHHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ PWM       LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ GND       LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ TRINT     LHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ DRVB      LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ DRVA      LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+/EXTINT    HLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+/BRAKE     HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+ PWMEN     LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ D0        ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZHZZZZZZZZZZZZZZ
+/EWR       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+/ERD       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHH
+/CSPWM     HHHHHHHHHHHHHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHL
+/CSLATCH   HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+ VCC       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+
+PAL22V10       
+Page : 2 
+           ggggggggggggc  gc  gc  gc  pggpgg                           
+ CLOCK     LLLLLLLLLLLLHHLLHHLLHHLLHHLLLLLLL                           
+ A[19]     HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+ A[18]     LLLHHHHHLLLLLLLLLLLLLLLLLLLLLLLLL                           
+ A[17]     LHHLLHHHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+ A[16]     HLHLHLHHLLLLLLLLLLLLLLLLLLLLLLLLL                           
+/WR        LLLLLLLHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+/RD        HHHHHHHHLLHHHHHHHHHHHHHHHHHHHHHHH                           
+ D1        LLLLLLLLLLLHHHHLLLLLLLLLLLLLLLLLL                           
+ REFPOS    HHHHHHHHHLLLLLLLLLLLLLLLLLLLLLLLL                           
+/STROBE    LLLLLLLHLLHHHHHHHHHHHHHHHHHHHHHHH                           
+ PWM       LLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHLH                           
+ GND       LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL                           
+ TRINT     LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL                           
+ DRVB      LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH                           
+ DRVA      LLLLLLLLLLLLLXXXXXXXXHHHHLLLLLLHL                           
+/EXTINT    HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+/BRAKE     HHHHHHHHHHHHHLLLLHHHHHHHHHHHHHHHH                           
+ PWMEN     LLLLLLLLLLLLLXXXXXXXXHHHHLLLLLHHH                           
+ D0        ZZZZZZZZHLZZZZZZZZZHHHHLLLLLLLLLL                           
+/EWR       LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+/ERD       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+/CSPWM     HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+/CSLATCH   HLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+ VCC       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                           
+
diff --git a/pld/decoder.jdc b/pld/decoder.jdc
new file mode 100644
index 0000000..2640c47
--- /dev/null
+++ b/pld/decoder.jdc
@@ -0,0 +1,237 @@
+
+PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE   :DECODER.PDS              AUTHOR :Walter Fetter Lages      
+PATTERN :A                        COMPANY:UFRGS                    
+REVISION:1.0                      DATE   :10/10/02                 
+
+
+PAL22V10
+DECODER*
+QV0085*
+QP24*
+QF5828*
+G0*F0*
+L0000 00000000000000000000000000000000000000000000*
+L0044 11111111111111111111111111111111111111111111*
+L0088 11110111101101111011101111111111111110111111*
+L0132 00000000000000000000000000000000000000000000*
+L0176 00000000000000000000000000000000000000000000*
+L0220 00000000000000000000000000000000000000000000*
+L0264 00000000000000000000000000000000000000000000*
+L0308 00000000000000000000000000000000000000000000*
+L0352 00000000000000000000000000000000000000000000*
+L0396 00000000000000000000000000000000000000000000*
+L0440 11111111111111111111111111111111111111111111*
+L0484 11110111101110111011111111111111111110111111*
+L0528 00000000000000000000000000000000000000000000*
+L0572 00000000000000000000000000000000000000000000*
+L0616 00000000000000000000000000000000000000000000*
+L0660 00000000000000000000000000000000000000000000*
+L0704 00000000000000000000000000000000000000000000*
+L0748 00000000000000000000000000000000000000000000*
+L0792 00000000000000000000000000000000000000000000*
+L0836 00000000000000000000000000000000000000000000*
+L0880 00000000000000000000000000000000000000000000*
+L0924 11111111111111111111111111111111111111111111*
+L0968 11110111101110110111111110111111111110111111*
+L1012 00000000000000000000000000000000000000000000*
+L1056 00000000000000000000000000000000000000000000*
+L1100 00000000000000000000000000000000000000000000*
+L1144 00000000000000000000000000000000000000000000*
+L1188 00000000000000000000000000000000000000000000*
+L1232 00000000000000000000000000000000000000000000*
+L1276 00000000000000000000000000000000000000000000*
+L1320 00000000000000000000000000000000000000000000*
+L1364 00000000000000000000000000000000000000000000*
+L1408 00000000000000000000000000000000000000000000*
+L1452 00000000000000000000000000000000000000000000*
+L1496 11111111111111111111111111111111111111111111*
+L1540 11110111101110110111101111111111111110111111*
+L1584 00000000000000000000000000000000000000000000*
+L1628 00000000000000000000000000000000000000000000*
+L1672 00000000000000000000000000000000000000000000*
+L1716 00000000000000000000000000000000000000000000*
+L1760 00000000000000000000000000000000000000000000*
+L1804 00000000000000000000000000000000000000000000*
+L1848 00000000000000000000000000000000000000000000*
+L1892 00000000000000000000000000000000000000000000*
+L1936 00000000000000000000000000000000000000000000*
+L1980 00000000000000000000000000000000000000000000*
+L2024 00000000000000000000000000000000000000000000*
+L2068 00000000000000000000000000000000000000000000*
+L2112 00000000000000000000000000000000000000000000*
+L2156 11110111101101111011111110111111111110111111*
+L2200 11111111111111111111111111111111011111111111*
+L2244 00000000000000000000000000000000000000000000*
+L2288 00000000000000000000000000000000000000000000*
+L2332 00000000000000000000000000000000000000000000*
+L2376 00000000000000000000000000000000000000000000*
+L2420 00000000000000000000000000000000000000000000*
+L2464 00000000000000000000000000000000000000000000*
+L2508 00000000000000000000000000000000000000000000*
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+L2640 00000000000000000000000000000000000000000000*
+L2684 00000000000000000000000000000000000000000000*
+L2728 00000000000000000000000000000000000000000000*
+L2772 00000000000000000000000000000000000000000000*
+L2816 00000000000000000000000000000000000000000000*
+L2860 00000000000000000000000000000000000000000000*
+L2904 11111111111111111111111111111111111111111111*
+L2948 11111111111111111101111111111111111111111111*
+L2992 00000000000000000000000000000000000000000000*
+L3036 00000000000000000000000000000000000000000000*
+L3080 00000000000000000000000000000000000000000000*
+L3124 00000000000000000000000000000000000000000000*
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+L3520 00000000000000000000000000000000000000000000*
+L3564 00000000000000000000000000000000000000000000*
+L3608 00000000000000000000000000000000000000000000*
+L3652 11111111111111111111111111111111111111111111*
+L3696 11111111111111111111111111110111111111111111*
+L3740 00000000000000000000000000000000000000000000*
+L3784 00000000000000000000000000000000000000000000*
+L3828 00000000000000000000000000000000000000000000*
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+L4136 00000000000000000000000000000000000000000000*
+L4180 00000000000000000000000000000000000000000000*
+L4224 00000000000000000000000000000000000000000000*
+L4268 00000000000000000000000000000000000000000000*
+L4312 11111111111111111111111111111111111111111111*
+L4356 11111111111111111111111111111111111111111101*
+L4400 00000000000000000000000000000000000000000000*
+L4444 00000000000000000000000000000000000000000000*
+L4488 00000000000000000000000000000000000000000000*
+L4532 00000000000000000000000000000000000000000000*
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+L4620 00000000000000000000000000000000000000000000*
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+L4708 00000000000000000000000000000000000000000000*
+L4752 00000000000000000000000000000000000000000000*
+L4796 00000000000000000000000000000000000000000000*
+L4840 00000000000000000000000000000000000000000000*
+L4884 11111111111111111111111111111111111111111111*
+L4928 11111111111111111111111011111111111111111011*
+L4972 00000000000000000000000000000000000000000000*
+L5016 00000000000000000000000000000000000000000000*
+L5060 00000000000000000000000000000000000000000000*
+L5104 00000000000000000000000000000000000000000000*
+L5148 00000000000000000000000000000000000000000000*
+L5192 00000000000000000000000000000000000000000000*
+L5236 00000000000000000000000000000000000000000000*
+L5280 00000000000000000000000000000000000000000000*
+L5324 00000000000000000000000000000000000000000000*
+L5368 11111111111111111111111111111111111111111111*
+L5412 11111111111111111111111011111111111111110111*
+L5456 00000000000000000000000000000000000000000000*
+L5500 00000000000000000000000000000000000000000000*
+L5544 00000000000000000000000000000000000000000000*
+L5588 00000000000000000000000000000000000000000000*
+L5632 00000000000000000000000000000000000000000000*
+L5676 00000000000000000000000000000000000000000000*
+L5720 00000000000000000000000000000000000000000000*
+L5764 00000000000000000000000000000000000000000000*
+L5808 01010101111000011111*
+X0*
+V0001 0XXXXXXXXXXNXLLHHLZHHHHN*
+V0002 0XXXXXXXXXXN1LLLHLZHHHHN*
+V0003 0XXXXXXXXXXN0LLHHLZHHHHN*
+V0004 0000011XX1XN0LLHHLZHHHHN*
+V0005 0000111XX1XN0LLHHLZHHHHN*
+V0006 0001011XX1XN0LLHHLZHHHHN*
+V0007 0001111XX1XN0LLHHLZHHHHN*
+V0008 0010011XX1XN0LLHHLZHHHHN*
+V0009 0010111XX1XN0LLHHLZHHHHN*
+V0010 0011011XX1XN0LLHHLZHHHHN*
+V0011 0011111XX1XN0LLHHLZHHHHN*
+V0012 0100011XX1XN0LLHHLZHHHHN*
+V0013 0100111XX1XN0LLHHLZHHHHN*
+V0014 0101011XX1XN0LLHHLZHHHHN*
+V0015 0101111XX1XN0LLHHLZHHHHN*
+V0016 0110011XX1XN0LLHHLZHHHHN*
+V0017 0110111XX1XN0LLHHLZHHHHN*
+V0018 0111011XX1XN0LLHHLZHHHHN*
+V0019 0111111XX1XN0LLHHLZHHHHN*
+V0020 0000011XX0XN0LLHHLZHHHHN*
+V0021 0000111XX0XN0LLHHLZHHHHN*
+V0022 0001011XX0XN0LLHHLZHHHHN*
+V0023 0001111XX0XN0LLHHLZHHHHN*
+V0024 0010011XX0XN0LLHHLZHHHHN*
+V0025 0010111XX0XN0LLHHLZHHHHN*
+V0026 0011011XX0XN0LLHHLZHHHHN*
+V0027 0011111XX0XN0LLHHLZHHHHN*
+V0028 0100011XX0XN0LLHHLZHHLHN*
+V0029 0100111XX0XN0LLHHLZHHHHN*
+V0030 0101011XX0XN0LLHHLZHHHHN*
+V0031 0101111XX0XN0LLHHLZHHHHN*
+V0032 0110011XX0XN0LLHHLZHHHHN*
+V0033 0110111XX0XN0LLHHLZHHHHN*
+V0034 0111011XX0XN0LLHHLZHHHHN*
+V0035 0111111XX0XN0LLHHLZHHHHN*
+V0036 0000010XX0XN0LLHHLZHHHHN*
+V0037 0000110XX0XN0LLHHLZHHHHN*
+V0038 0001010XX0XN0LLHHLZHHHHN*
+V0039 0001110XX0XN0LLHHLZHHHHN*
+V0040 0010010XX0XN0LLHHLZHHHHN*
+V0041 0010110XX0XN0LLHHLZHHHHN*
+V0042 0011010XX0XN0LLHHLZHHHHN*
+V0043 0011110XX0XN0LLHHLZHHHHN*
+V0044 0100010XX0XN0LLHHLZHHLHN*
+V0045 0100110XX0XN0LLHHLZHLHHN*
+V0046 0101010X10XN0LLHHLHHHHHN*
+V0047 0101110X10XN0LLHHLZHHHHN*
+V0048 0110010X10XN0LLHHLZHHHHN*
+V0049 0110110X10XN0LLHHLZHHHHN*
+V0050 0111010X10XN0LLHHLZHHHHN*
+V0051 0111110X10XN0LLHHLZHHHHN*
+V0052 0000001X10XN0LLHHLZHHHHN*
+V0053 0000101X10XN0LLHHLZHHHHN*
+V0054 0001001X10XN0LLHHLZHHHHN*
+V0055 0001101X10XN0LLHHLZHHHHN*
+V0056 0010001X10XN0LLHHLZHHHHN*
+V0057 0010101X10XN0LLHHLZHHHHN*
+V0058 0011001X10XN0LLHHLZHHHHN*
+V0059 0011101X10XN0LLHHLZHHHHN*
+V0060 0100001X10XN0LLHHLZHHLHN*
+V0061 0100101X10XN0LLHHLZLHHHN*
+V0062 0101001X10XN0LLHHLZHHHLN*
+V0063 0101101X10XN0LLHHLZHHHHN*
+V0064 0110001X10XN0LLHHLZHHHHN*
+V0065 0110101X10XN0LLHHLZHHHHN*
+V0066 0111001X10XN0LLHHLZHHHHN*
+V0067 0111101X10XN0LLHHLZHHHHN*
+V0068 0111111X11XN0LLHHLZHHHHN*
+V0069 0101010X10XN0LLHHLHHHHHN*
+V0070 0101010X00XN0LLHHLLHHHHN*
+V0071 0101011X01XN0LLHHLZHHHHN*
+V0072 0101011101XN0LLHHLZHHHHN*
+V0073 C101011101XN0LXHLXZHHHHN*
+V0074 0101011001XN0LXHLXZHHHHN*
+V0075 C101011001XN0LXHHXZHHHHN*
+V0076 0101011001XN0LXHHX1HHHHN*
+V0077 C101011001XN0LHHHH1HHHHN*
+V0078 0101011001XN0LHHHH0HHHHN*
+V0079 C101011001XN0LLHHL0HHHHN*
+V0080 P1010110010N0XXXX10XXXXN*
+V0081 01010110010N0LLHHL0HHHHN*
+V0082 01010110011N0LLHHL0HHHHN*
+V0083 P1010110011N0XXXX00XXXXN*
+V0084 01010110010N0LHHHH0HHHHN*
+V0085 01010110011N0HLHHH0HHHHN*
+C6C0E*
+A8AD
diff --git a/pld/decoder.jed b/pld/decoder.jed
new file mode 100644
index 0000000..50b49a4
--- /dev/null
+++ b/pld/decoder.jed
@@ -0,0 +1,150 @@
+
+PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE   :DECODER.PDS              AUTHOR :Walter Fetter Lages      
+PATTERN :A                        COMPANY:UFRGS                    
+REVISION:1.0                      DATE   :10/10/02                 
+
+
+PAL22V10
+DECODER*
+QP24*
+QF5828*
+G0*F0*
+L0000 00000000000000000000000000000000000000000000*
+L0044 11111111111111111111111111111111111111111111*
+L0088 11110111101101111011101111111111111110111111*
+L0132 00000000000000000000000000000000000000000000*
+L0176 00000000000000000000000000000000000000000000*
+L0220 00000000000000000000000000000000000000000000*
+L0264 00000000000000000000000000000000000000000000*
+L0308 00000000000000000000000000000000000000000000*
+L0352 00000000000000000000000000000000000000000000*
+L0396 00000000000000000000000000000000000000000000*
+L0440 11111111111111111111111111111111111111111111*
+L0484 11110111101110111011111111111111111110111111*
+L0528 00000000000000000000000000000000000000000000*
+L0572 00000000000000000000000000000000000000000000*
+L0616 00000000000000000000000000000000000000000000*
+L0660 00000000000000000000000000000000000000000000*
+L0704 00000000000000000000000000000000000000000000*
+L0748 00000000000000000000000000000000000000000000*
+L0792 00000000000000000000000000000000000000000000*
+L0836 00000000000000000000000000000000000000000000*
+L0880 00000000000000000000000000000000000000000000*
+L0924 11111111111111111111111111111111111111111111*
+L0968 11110111101110110111111110111111111110111111*
+L1012 00000000000000000000000000000000000000000000*
+L1056 00000000000000000000000000000000000000000000*
+L1100 00000000000000000000000000000000000000000000*
+L1144 00000000000000000000000000000000000000000000*
+L1188 00000000000000000000000000000000000000000000*
+L1232 00000000000000000000000000000000000000000000*
+L1276 00000000000000000000000000000000000000000000*
+L1320 00000000000000000000000000000000000000000000*
+L1364 00000000000000000000000000000000000000000000*
+L1408 00000000000000000000000000000000000000000000*
+L1452 00000000000000000000000000000000000000000000*
+L1496 11111111111111111111111111111111111111111111*
+L1540 11110111101110110111101111111111111110111111*
+L1584 00000000000000000000000000000000000000000000*
+L1628 00000000000000000000000000000000000000000000*
+L1672 00000000000000000000000000000000000000000000*
+L1716 00000000000000000000000000000000000000000000*
+L1760 00000000000000000000000000000000000000000000*
+L1804 00000000000000000000000000000000000000000000*
+L1848 00000000000000000000000000000000000000000000*
+L1892 00000000000000000000000000000000000000000000*
+L1936 00000000000000000000000000000000000000000000*
+L1980 00000000000000000000000000000000000000000000*
+L2024 00000000000000000000000000000000000000000000*
+L2068 00000000000000000000000000000000000000000000*
+L2112 00000000000000000000000000000000000000000000*
+L2156 11110111101101111011111110111111111110111111*
+L2200 11111111111111111111111111111111011111111111*
+L2244 00000000000000000000000000000000000000000000*
+L2288 00000000000000000000000000000000000000000000*
+L2332 00000000000000000000000000000000000000000000*
+L2376 00000000000000000000000000000000000000000000*
+L2420 00000000000000000000000000000000000000000000*
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+L2772 00000000000000000000000000000000000000000000*
+L2816 00000000000000000000000000000000000000000000*
+L2860 00000000000000000000000000000000000000000000*
+L2904 11111111111111111111111111111111111111111111*
+L2948 11111111111111111101111111111111111111111111*
+L2992 00000000000000000000000000000000000000000000*
+L3036 00000000000000000000000000000000000000000000*
+L3080 00000000000000000000000000000000000000000000*
+L3124 00000000000000000000000000000000000000000000*
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+L3608 00000000000000000000000000000000000000000000*
+L3652 11111111111111111111111111111111111111111111*
+L3696 11111111111111111111111111110111111111111111*
+L3740 00000000000000000000000000000000000000000000*
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+L4356 11111111111111111111111111111111111111111101*
+L4400 00000000000000000000000000000000000000000000*
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+L4928 11111111111111111111111011111111111111111011*
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+L5412 11111111111111111111111011111111111111110111*
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+C6C0E*
+17B8
diff --git a/pld/decoder.pds b/pld/decoder.pds
new file mode 100644
index 0000000..341c554
--- /dev/null
+++ b/pld/decoder.pds
@@ -0,0 +1,273 @@
+
+;PALASM Design Description
+
+;---------------------------------- Declaration Segment ------------
+TITLE    DECODER.PDS
+PATTERN  A
+REVISION 1.0
+AUTHOR   Walter Fetter Lages
+COMPANY  UFRGS
+DATE     10/10/02
+
+CHIP  DECODER   PAL22V10
+
+;---------------------------------- PIN Declarations ---------------
+PIN  1          CLOCK				; INPUT
+PIN  2..5       A[19..16]			; INPUT
+PIN  6          /WR				; INPUT
+PIN  7		/RD				; INPUT
+PIN  8		D1				; INPUT
+PIN  9		REFPOS				; INPUT
+PIN  10		/STROBE				; INPUT
+PIN  11         PWM				; INPUT
+PIN  12         GND				
+PIN  13         TRINT				; INPUT
+PIN  14         DRVB		COMBINATORIAL		; OUTPUT
+PIN  15         DRVA		COMBINATORIAL		; OUTPUT
+PIN  16         /EXTINT		COMBINATORIAL		; OUTPUT
+PIN  17         /BRAKE		REGISTERED              ; OUTPUT
+PIN  18         PWMEN           REGISTERED              ; OUTPUT
+PIN  19         D0              COMBINATORIAL           ; I/O
+PIN  20		/EWR		COMBINATORIAL		; OUTPUT
+PIN  21         /ERD		COMBINATORIAL		; OUTPUT
+PIN  22         /CSPWM		COMBINATORIAL		; OUTPUT
+PIN  23         /CSLATCH	COMBINATORIAL		; OUTPUT
+PIN  24         VCC				
+
+
+;----------------------------------- Boolean Equation Segment ------
+EQUATIONS
+
+EXTINT = TRINT
+
+CSPWM= STROBE * A[19] * /A[18] * /A[17] * /A[16]  
+ERD= STROBE * RD * A[19] * /A[18] * /A[17] * A[16] 
+EWR= STROBE * WR * A[19] * /A[18] * /A[17] * A[16] 
+CSLATCH= STROBE * WR * A[19] * /A[18] * A[17] * /A[16] 
+
+D0.TRST= STROBE * RD * A[19] * /A[18] * A[17] * /A[16]
+D0=REFPOS
+PWMEN=D0
+
+BRAKE=D1
+
+DRVA=PWMEN * /PWM
+DRVB=PWMEN * PWM
+
+;----------------------------------- State Segment -----------------
+STATE
+
+CLKF = CLOCK
+
+;----------------------------------- Simulation Segment ------------
+SIMULATION
+
+SETF /CLOCK
+
+; TRINT/EXTINT tests
+
+TRACE_ON TRINT EXTINT
+SETF TRINT
+CHECK EXTINT
+SETF /TRINT
+CHECK /EXTINT
+TRACE_OFF
+
+; Address decoding tests
+
+TRACE_ON A[19..16] /STROBE /RD /WR /CSPWM /ERD /EWR /CSLATCH D0
+
+SETF /A[19] /A[18] /A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] /A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+
+SETF /A[19] /A[18] /A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] /A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] /A[16] STROBE /RD /WR
+CHECK CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+
+SETF /A[19] /A[18] /A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] /A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] /A[16] STROBE RD /WR	; CSPWM active
+CHECK CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] A[16] STROBE RD /WR	; ERD active
+CHECK /CSPWM ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] /A[16] STROBE RD /WR REFPOS ; DO driving output
+CHECK /CSPWM /ERD /EWR /CSLATCH D0
+SETF A[19] /A[18] A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+
+SETF /A[19] /A[18] /A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] /A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] /A[16] STROBE /RD WR
+CHECK CSPWM /ERD /EWR /CSLATCH ^D0		; CSPWM active
+SETF A[19] /A[18] /A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD EWR /CSLATCH ^D0		; EWR active
+SETF A[19] /A[18] A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR CSLATCH ^D0		; CSLATCH active
+SETF A[19] /A[18] A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /STROBE /RD /WR
+
+TRACE_OFF
+
+; REFPOS tests
+
+TRACE_ON A[19..16] /STROBE /RD /WR /CSPWM /ERD /EWR /CSLATCH D0  REFPOS
+
+SETF A[19] /A[18] A[17] /A[16] STROBE RD /WR REFPOS
+CHECK /CSPWM /ERD /EWR /CSLATCH D0
+SETF A[19] /A[18] A[17] /A[16] STROBE RD /WR /REFPOS
+CHECK /CSPWM /ERD /EWR /CSLATCH /D0 
+SETF /STROBE /RD /WR
+
+TRACE_OFF
+
+; BRAKE/D1 tests
+
+TRACE_ON CLOCK D1 BRAKE
+
+SETF D1
+CLOCKF CLOCK
+CHECK BRAKE
+SETF /D1
+CLOCKF CLOCK
+CHECK /BRAKE
+
+TRACE_OFF
+
+; PWMEN/D0 tests
+
+TRACE_ON CLOCK D0 PWMEN
+
+SETF D0
+CLOCKF CLOCK
+CHECK PWMEN
+SETF /D0
+CLOCKF CLOCK
+CHECK /PWMEN
+
+TRACE_OFF
+
+; DRVA/DRVB/PWM tests
+
+TRACE_ON PWMEN PWM DRVA DRVB
+
+PRELOAD /PWMEN
+SETF /PWM
+CHECK /DRVA /DRVB
+SETF PWM
+CHECK /DRVA /DRVB
+
+PRELOAD PWMEN
+SETF /PWM
+CHECK DRVA /DRVB
+SETF PWM
+CHECK /DRVA DRVB
+
+TRACE_OFF
+
+;-------------------------------------------------------------------
+
+
diff --git a/pld/decoder.pin b/pld/decoder.pin
new file mode 100644
index 0000000..c7b6c37
--- /dev/null
+++ b/pld/decoder.pin
@@ -0,0 +1,22 @@
+TITLE:     DECODER.PDS
+PATTERN:   A
+REVISION:  1.0
+AUTHOR:    Walter Fetter Lages
+COMPANY:   UFRGS
+DATE:      10/10/02
+MACRO:     DECODER
+                                 PAL22V10
+                                ÉÍÍÍÍÉ»ÍÍÍÍ»
+                      CLOCK   É͹ 1  ȼ 24 ÌÍ»  VCC                            
+                      A[19]   É͹ 2     23 ÌÍ» /CSLATCH COM                    
+                      A[18]   É͹ 3     22 ÌÍ» /CSPWM   COM                    
+                      A[17]   É͹ 4     21 ÌÍ» /ERD     COM                    
+                      A[16]   É͹ 5     20 ÌÍ» /EWR     COM                    
+                     /WR      É͹ 6     19 ÌÍ»  D0      COM                    
+                     /RD      É͹ 7     18 ÌÍ»  PWMEN   REG                    
+                      D1      É͹ 8     17 ÌÍ» /BRAKE   REG                    
+                      REFPOS  É͹ 9     16 ÌÍ» /EXTINT  COM                    
+                     /STROBE  É͹ 10    15 ÌÍ»  DRVA    COM                    
+                      PWM     É͹ 11    14 ÌÍ»  DRVB    COM                    
+                      GND     É͹ 12    13 ÌÍ»  TRINT                          
+                                ÈÍÍÍÍÍÍÍÍÍͼ
diff --git a/pld/decoder.psf b/pld/decoder.psf
new file mode 100644
index 0000000..0e355e8
--- /dev/null
+++ b/pld/decoder.psf
@@ -0,0 +1,76 @@
+TITLE 'Actuator Interface Card Decoder '
+DESIGNER 'Walter Fetter Lages '
+DATE 'October, 11 2002 '
+
+Description
+	This is the decoder for the Actuator Interface Card. It' main purpose is to decode the addresses
+ from TINI and generate the control signals for the chips connected to TINI bus (8254 and HCTL-2016).
+	However it is also used for other purposes:
+		1) generate the driving signals to the mosfet motor driver (maps PWM to DRVA and DRVB)
+		2) invert the interrupt request from 8254 (maps TRINT to EXTINT)
+		3) generate the driving signal to the mosfet breake driver (latched output contoled by D0)
+		4) read the reference position sensor (REFPOS is tri-stated and output to D0)
+End_Desc;
+
+PEEL22CV10A
+
+CLK pin 1
+A19 Pin 2 
+A18 Pin 3 
+A17 Pin 4 
+A16 Pin 5 
+/WR Pin 6 
+/RD Pin 7 
+D1 Pin 8 
+REFPOS Pin 9 
+STROBE Pin 10 
+PWM Pin 11 
+TRINT Pin 13 
+
+
+"I/O CONFIGURATION DECLARATION
+"IOC (PIN_NO	'PIN_NAME'	POLARITY	OUTPUT_TYPE	FEEDBACK_TYPE	)
+ IOC (  14	'DRVB'		Pos		OutCom		Feed_Pin	)
+ IOC (  15	'DRVA'		Pos		OutCom		Feed_Pin	)
+ IOC (  16	'EXTINT'	Pos		OutCom		Feed_Pin	)
+ IOC (  17	'BRAKE'		Pos		Reg		Feed_Reg	)
+ IOC (  18	'PWMEN'		Pos		OutReg		Feed_Reg	)
+ IOC (  19	'D0'		Pos		Com		Feed_Pin	)
+ IOC (  20	'/EWR'		Pos		OutCom		Feed_Pin	)
+ IOC (  21	'/ERD'		Pos		OutCom		Feed_Pin	)
+ IOC (  22	'/CSPWM'	Pos		OutCom		Feed_Pin	)
+ IOC (  23	'CSLATCH'	Pos		OutCom		Feed_Pin	)
+
+AR NODE 25  "Global Asynchronous Reset
+SP NODE 26  "Global Synchronous Preset
+
+DEFINE
+
+
+EQUATIONS
+
+AR = 0;
+
+SP = 0;
+
+"All Equations must end with semicolons.
+"Internal or External output names appended with extensions:
+"  1) .COM for Combinatorial Output
+"  2) .D for D-type Registered Output
+"  3) .OE for Output Enable Control
+
+EXTINT=!TRINT
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/pld/decoder.trf b/pld/decoder.trf
new file mode 100644
index 0000000..c41f247
--- /dev/null
+++ b/pld/decoder.trf
@@ -0,0 +1,92 @@
+PALASM4  PLDSIM   - MARKET RELEASE 1.5 (7-10-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+PALASM SIMULATION SELECTIVE TRACE LISTING
+
+Title     : DECODER.PDS              Author   : Walter Fetter Lag
+Pattern   : A                        Company  : UFRGS            
+Revision  : 1.0                      Date     : 10/10/02         
+
+PAL22V10       
+Page : 1 
+
+         gg                                                          
+ TRINT   HL                                                          
+ EXTINT  HL                                                          
+
+PAL22V10       
+Page : 2 
+
+           gggggggggggggggggggggggggggggggggggggggggggggggggggggggggggg
+ A[19]     LLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLHHHH
+ A[18]     LLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLL
+ A[17]     LLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHH
+ A[16]     LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH
+/STROBE    HHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+/RD        HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLHHHHHHHHHHHH
+/WR        HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLLLLL
+/CSPWM     HHHHHHHHHHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHLHHH
+/ERD       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHHHH
+/EWR       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLHH
+/CSLATCH   HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLH
+ D0        ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZHZZZZZZZZZZZZZZZZZ
+
+PAL22V10       
+Page : 3 
+           ggggg                                                       
+ A[19]     HHHHH                                                       
+ A[18]     HHHHH                                                       
+ A[17]     LLHHH                                                       
+ A[16]     LHLHH                                                       
+/STROBE    LLLLH                                                       
+/RD        HHHHH                                                       
+/WR        LLLLH                                                       
+/CSPWM     HHHHH                                                       
+/ERD       HHHHH                                                       
+/EWR       HHHHH                                                       
+/CSLATCH   HHHHH                                                       
+ D0        ZZZZZ                                                       
+
+PAL22V10       
+Page : 4 
+
+           ggg                                                         
+ A[19]     HHH                                                         
+ A[18]     LLL                                                         
+ A[17]     HHH                                                         
+ A[16]     LLL                                                         
+/STROBE    LLH                                                         
+/RD        LLH                                                         
+/WR        HHH                                                         
+/CSPWM     HHH                                                         
+/ERD       HHH                                                         
+/EWR       HHH                                                         
+/CSLATCH   HHH                                                         
+ D0        HLZ                                                         
+ REFPOS    HLL                                                         
+
+PAL22V10       
+Page : 5 
+
+        gc  gc                                                      
+ CLOCK  LHHLLHHL                                                    
+ D1     HHHHLLLL                                                    
+ BRAKE  LLHHHHLL                                                    
+
+PAL22V10       
+Page : 6 
+
+        gc  gc                                                      
+ CLOCK  LHHLLHHL                                                    
+ D0     HHHHLLLL                                                    
+ PWMEN  XXHHHHLL                                                    
+
+PAL22V10       
+Page : 7 
+
+        pggpgg                                                      
+ PWMEN  LLLHHH                                                      
+ PWM    LLHHLH                                                      
+ DRVA   LLLLHL                                                      
+ DRVB   LLLLLH                                                      
+
diff --git a/pld/decoder.wdh b/pld/decoder.wdh
new file mode 100644
index 0000000..829eaa7
--- /dev/null
+++ b/pld/decoder.wdh
@@ -0,0 +1,92 @@
+           gggggggggggggggggggggggggggggggggggggggggggggggggggggggggggggggg
+ CLOCK     ¿                                                               
+           ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ A[19]     ¿          ÚÄÄÄÄÄÄÄ¿       ÚÄÄÄÄÄÄÄ¿       ÚÄÄÄÄÄÄÄ¿       ÚÄÄÄÄ
+           ÀÄÄÄÄÄÄÄÄÄÄÙ       ÀÄÄÄÄÄÄÄÙ       ÀÄÄÄÄÄÄÄÙ       ÀÄÄÄÄÄÄÄÙ    
+ A[18]     ¿      ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   Ú
+           ÀÄÄÄÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ
+ A[17]     ¿    ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿
+           ÀÄÄÄÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ À
+ A[16]     ¿   Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿
+           ÀÄÄÄÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀ
+/WR        ¿  ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿            
+           ÀÄÄÙ                                               ÀÄÄÄÄÄÄÄÄÄÄÄÄ
+/RD        ¿  ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿               ÚÄÄÄÄÄÄÄÄÄÄÄÄ
+           ÀÄÄÙ                               ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ            
+ D1        ¿                                                               
+           ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ REFPOS    ¿                                                ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+           ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ              
+/STROBE    ¿  ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿                                            
+           ÀÄÄÙ               ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ PWM       ¿                                                               
+           ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ TRINT     ¿Ú¿                                                             
+           ÀÙÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ DRVB      ¿                                                               
+           ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ DRVA      ¿                                                               
+           ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+/EXTINT    Ú¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+           ÙÀÙ                                                             
+/BRAKE     ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+           Ù                                                               
+ PWMEN     ¿                                                               
+           ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ D0        ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZÚZZZZZZZZZZZZZZ
+                                                            Ù              
+/EWR       ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+           Ù                                                               
+/ERD       ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+           Ù                                               ÀÙ              
+/CSPWM     ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿
+           Ù                              ÀÙ              ÀÙ              À
+/CSLATCH   ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+           Ù                                                               
+
+ggggggggc  gc  gc  gc  pggpgg
+        ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿      
+ÄÄÄÄÄÄÄÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÄÄÄÄÄ
+ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+                             
+ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+                             
+ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ÄÙ                           
+Ú¿ÚÄ¿                        
+ÙÀÙ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+   ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ÄÄÄÙ                         
+ÄÄÄÄ¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+    ÀÄÙ                      
+       ÚÄÄÄ¿                 
+ÄÄÄÄÄÄÄÙ   ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ÄÄÄÄÄ¿                       
+     ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+   Ú¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ÄÄÄÙÀÄÙ                      
+                         ÚÄ¿Ú
+ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÀÙ
+                             
+ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+                            Ú
+ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ
+                 ÚÄÄÄ¿     Ú¿
+ÄÄÄÄÄÄÄÄÄXXXXXXXXÙ   ÀÄÄÄÄÄÙÀ
+ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+                             
+ÄÄÄÄÄÄÄÄÄ¿   ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+         ÀÄÄÄÙ               
+                 ÚÄÄÄ¿    ÚÄÄ
+ÄÄÄÄÄÄÄÄÄXXXXXXXXÙ   ÀÄÄÄÄÙ  
+ZZZZÄ¿         ÚÄÄÄ¿         
+     ÀZZZZZZZZZÙ   ÀÄÄÄÄÄÄÄÄÄ
+¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ÀÙ                           
+ÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+                             
+ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+Ù                            
+Ä¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ
+ ÀÙ                          
+
diff --git a/pld/decoder.wdt b/pld/decoder.wdt
new file mode 100644
index 0000000..048269d
--- /dev/null
+++ b/pld/decoder.wdt
@@ -0,0 +1,92 @@
+          gg#gggggggggggggggggggggggggggggggggggggggggggggggggggggggggggggg
+ TRINT    Ú¿#                                                              
+          ÙÀ#                                                             Z
+ EXTINT   Ú¿#                                                             Ú
+          ÙÀ#                                                             Ù
+ A[19]      #¿       ÚÄÄÄÄÄÄÄ¿       ÚÄÄÄÄÄÄÄ¿       ÚÄÄÄÄÄÄÄ¿       ÚÄÄÄ#Ä
+            #ÀÄÄÄÄÄÄÄÙ       ÀÄÄÄÄÄÄÄÙ       ÀÄÄÄÄÄÄÄÙ       ÀÄÄÄÄÄÄÄÙ   # 
+ A[18]      #¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   ÚÄÄÄ¿   #Ú
+            #ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄÙ   ÀÄÄÄ#Ù
+ A[17]      #¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ¿ ÚÄ#Ä
+            #ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ ÀÄÙ # 
+ A[16]      #¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú¿Ú#¿
+            #ÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙÀÙ#À
+/STROBE     #ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿                                           # 
+            #Ù               ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ#Ä
+/RD         #ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿               ÚÄÄÄÄÄÄÄÄÄÄÄ#¿
+            #Ù                               ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ           #À
+/WR         #ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿           #Ú
+            #Ù                                               ÀÄÄÄÄÄÄÄÄÄÄÄ#Ù
+/CSPWM      #ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄ#Ä
+            #Ù                           ÀÙ              ÀÙ              # 
+/ERD        #ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ÚÄÄÄÄÄÄÄÄÄÄÄÄÄ#Ä
+            #Ù                                            ÀÙ             # 
+/EWR        #ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ#Ä
+            #Ù                                                           # 
+/CSLATCH    #ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ#Ä
+            #Ù                                                           # 
+ D0         #ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZÚZZZZZZZZZZZZZ#Ä
+            #                                              Ù             # 
+ REFPOS                                                                  #Ú
+                                                                         #Ù
+ CLOCK                                                                     
+                                                                           
+ D1                                                                        
+                                                                           
+ BRAKE                                                                     
+                                                                           
+ PWMEN                                                                     
+                                                                           
+ PWM                                                                       
+                                                                           
+ DRVA                                                                      
+                                                                           
+ DRVB                                                                      
+                                                                           
+
+ggg#ggg#gc  gc  #gc  gc  #pggpgg
+   #   #        #        #      
+ZZZ#   #        #        #      
+ÄÄÄ#   #        #        #      
+   #   #        #        #      
+ÄÄ#        #        #           
+  #        #        #           
+ÄÄ#        #        #           
+  #        #        #           
+ÄÄ#        #        #           
+  #        #        #           
+  #        #        #           
+ÄÄ#        #        #           
+ Ú#        #        #           
+ÄÙ#        #        #           
+ Ú#        #        #           
+ÄÙ#        #        #           
+ÄÄ#        #        #           
+  #        #        #           
+ÄÄ#        #        #           
+  #        #        #           
+ÄÄ#        #        #           
+  #        #        #           
+ÄÄ#        #        #           
+  #        #        #           
+ÄÄ#        #        #           
+  #        #        #           
+¿ #        #ÚÄÄÄ¿   #           
+ÀZ#        #Ù   ÀÄÄÄ#           
+¿ #        #        #           
+ÀÄ#        #        #           
+  #¿ÚÄ¿ ÚÄ¿# ÚÄ¿ ÚÄ¿#           
+  #ÀÙ ÀÄÙ À#ÄÙ ÀÄÙ À#           
+  #ÚÄÄÄ¿   #        #           
+  #Ù   ÀÄÄÄ#        #           
+  #¿ ÚÄÄÄ¿ #        #           
+  #ÀÄÙ   ÀÄ#        #           
+           #XXÚÄÄÄ¿ #   ÚÄÄ     
+           #  Ù   ÀÄ#ÄÄÄÙ       
+                    #¿ ÚÄ¿Ú     
+                    #ÀÄÙ ÀÙ     
+                    #¿   Ú¿     
+                    #ÀÄÄÄÙÀ     
+                    #¿    Ú     
+                    #ÀÄÄÄÄÙ     
+
diff --git a/pld/decoder.xpt b/pld/decoder.xpt
new file mode 100644
index 0000000..be6aba2
--- /dev/null
+++ b/pld/decoder.xpt
@@ -0,0 +1,172 @@
+
+PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE   :DECODER.PDS              AUTHOR :Walter Fetter Lages      
+PATTERN :A                        COMPANY:UFRGS                    
+REVISION:1.0                      DATE   :10/10/02                 
+
+PAL22V10
+DECODER
+
+                   11  1111  1111  2222  2222  2233  3333  3333  4444  
+     0123  4567  8901  2345  6789  0123  4567  8901  2345  6789  0123  
+
+0    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+1    ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+2    ----  X---  -X--  X---  -X--  -X--  ----  ----  ----  -X--  ----    
+3    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+4    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+5    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+6    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+7    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+8    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+9    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+10   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+11   ----  X---  -X--  -X--  -X--  ----  ----  ----  ----  -X--  ----    
+12   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+13   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+14   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+15   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+16   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+17   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+18   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+19   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+20   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+21   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+22   ----  X---  -X--  -X--  X---  ----  -X--  ----  ----  -X--  ----    
+23   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+24   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+25   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+26   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+27   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+28   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+29   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+30   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+31   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+32   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+33   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+34   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+35   ----  X---  -X--  -X--  X---  -X--  ----  ----  ----  -X--  ----    
+36   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+37   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+38   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+39   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+40   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+41   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+42   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+43   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+44   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+45   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+46   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+47   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+48   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+49   ----  X---  -X--  X---  -X--  ----  -X--  ----  ----  -X--  ----    
+50   ----  ----  ----  ----  ----  ----  ----  ----  X---  ----  ----    
+51   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+52   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+53   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+54   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+55   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+56   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+57   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+58   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+59   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+60   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+61   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+62   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+63   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+64   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+65   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+66   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+67   ----  ----  ----  ----  --X-  ----  ----  ----  ----  ----  ----    
+68   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+69   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+70   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+71   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+72   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+73   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+74   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+75   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+76   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+77   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+78   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+79   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+80   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+81   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+82   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+83   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+84   ----  ----  ----  ----  ----  ----  ----  X---  ----  ----  ----    
+85   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+86   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+87   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+88   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+89   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+90   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+91   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+92   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+93   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+94   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+95   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+96   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+97   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+98   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+99   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  --X-    
+100  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+101  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+102  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+103  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+104  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+105  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+106  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+107  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+108  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+109  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+110  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+111  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+112  ----  ----  ----  ----  ----  ---X  ----  ----  ----  ----  -X--    
+113  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+114  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+115  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+116  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+117  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+118  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+119  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+120  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+121  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+122  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+123  ----  ----  ----  ----  ----  ---X  ----  ----  ----  ----  X---    
+124  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+125  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+126  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+127  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+128  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+129  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+130  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+131  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+ SUMMARY
+ -------
+
+      OUTPUT PINS:           1111112222
+                             4567890123
+    POLARITY FUSES:          --XX--XXXX
+
+      OUTPUT PINS:           1111112222
+                             4567890123
+    REG BYPASS FUSES:        ---XX-----
+
+      TOTAL FUSES BLOWN    = 855
+
diff --git a/pld/decoder1.hst b/pld/decoder1.hst
new file mode 100644
index 0000000..c320c1f
--- /dev/null
+++ b/pld/decoder1.hst
@@ -0,0 +1,65 @@
+PALASM4  PLDSIM   - MARKET RELEASE 1.5 (7-10-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+PALASM SIMULATION HISTORY LISTING
+
+Title     : DECODER.PDS              Author   : Walter Fetter Lag
+Pattern   : A                        Company  : UFRGS            
+Revision  : 1.0                      Date     : 10/10/02         
+
+PAL22V10       
+Page : 1 
+           gggggggggggggggggggggggggggggggggggggggggggggggggggggggggggg
+ CLOCK     LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ A[19]     LLLLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLHH
+ A[18]     LLLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLL
+ A[17]     LLLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLL
+ A[16]     LLLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH
+/WR        LLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLLL
+/RD        LLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLHHHHHHHHHH
+ D1        LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ REFPOS    LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHHHHHHHHHHHHHHHH
+/STROBE    LLHHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ PWM       LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ GND       LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ TRINT     HLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ DRVB      LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ DRVA      LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+/EXTINT    LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+/BRAKE     HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+ PWMEN     LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+ D0        ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZHZZZZZZZZZZZZZZZ
+/EWR       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHL
+/ERD       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHH
+/CSPWM     HHHHHHHHHHHHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHLH
+/CSLATCH   HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+ VCC       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH
+
+PAL22V10       
+Page : 2 
+           gggggggggggc  gc  gc  gc  gc  ggc  g                        
+ CLOCK     LLLLLLLLLLLHHLLHHLLHHLLHHLLHHLLLHHLL                        
+ A[19]     HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+ A[18]     LLHHHHHLLLLLLLLLLLLLLLLLLLLLLLLLLLLL                        
+ A[17]     HHLLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+ A[16]     LHLHLHHLLLLLLLLLLLLLLLLLLLLLLLLLLLLL                        
+/WR        LLLLLLHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+/RD        HHHHHHHLLHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+ D1        LLLLLLLLLLHHHHHHHHLLLLLLLLLLLLLLLLLL                        
+ REFPOS    HHHHHHHHLLLLLLLLLLLLLLLLLLLLLLLLLLLL                        
+/STROBE    LLLLLLHLLHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+ PWM       LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLHLLLLH                        
+ GND       LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL                        
+ TRINT     LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL                        
+ DRVB      LLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLH                        
+ DRVA      LLLLLLLLLLLLLLLLLLLLHHHHLLLLLLLLLHHL                        
+/EXTINT    HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+/BRAKE     HHHHHHHHHHHHLLLLHHHHHHHHHHHHHHHHHHHH                        
+ PWMEN     LLLLLLLLLLLLLLLLLLLLHHHHLLLLLLLLLHHH                        
+ D0        ZZZZZZZHLZHHHHLLLLHHHHLLLLLLLLLHHHHH                        
+/EWR       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+/ERD       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+/CSPWM     HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+/CSLATCH   LHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+ VCC       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH                        
+
diff --git a/pld/decoder1.jdc b/pld/decoder1.jdc
new file mode 100644
index 0000000..e8fbc03
--- /dev/null
+++ b/pld/decoder1.jdc
@@ -0,0 +1,236 @@
+
+PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE   :DECODER.PDS              AUTHOR :Walter Fetter Lages      
+PATTERN :A                        COMPANY:UFRGS                    
+REVISION:1.0                      DATE   :10/10/02                 
+
+
+PAL22V10
+DECODER*
+QV0084*
+QP24*
+QF5828*
+G0*F0*
+L0000 00000000000000000000000000000000000000000000*
+L0044 11111111111111111111111111111111111111111111*
+L0088 11110111101101111011101111111111111110111111*
+L0132 00000000000000000000000000000000000000000000*
+L0176 00000000000000000000000000000000000000000000*
+L0220 00000000000000000000000000000000000000000000*
+L0264 00000000000000000000000000000000000000000000*
+L0308 00000000000000000000000000000000000000000000*
+L0352 00000000000000000000000000000000000000000000*
+L0396 00000000000000000000000000000000000000000000*
+L0440 11111111111111111111111111111111111111111111*
+L0484 11110111101110111011111111111111111110111111*
+L0528 00000000000000000000000000000000000000000000*
+L0572 00000000000000000000000000000000000000000000*
+L0616 00000000000000000000000000000000000000000000*
+L0660 00000000000000000000000000000000000000000000*
+L0704 00000000000000000000000000000000000000000000*
+L0748 00000000000000000000000000000000000000000000*
+L0792 00000000000000000000000000000000000000000000*
+L0836 00000000000000000000000000000000000000000000*
+L0880 00000000000000000000000000000000000000000000*
+L0924 11111111111111111111111111111111111111111111*
+L0968 11110111101110110111111110111111111110111111*
+L1012 00000000000000000000000000000000000000000000*
+L1056 00000000000000000000000000000000000000000000*
+L1100 00000000000000000000000000000000000000000000*
+L1144 00000000000000000000000000000000000000000000*
+L1188 00000000000000000000000000000000000000000000*
+L1232 00000000000000000000000000000000000000000000*
+L1276 00000000000000000000000000000000000000000000*
+L1320 00000000000000000000000000000000000000000000*
+L1364 00000000000000000000000000000000000000000000*
+L1408 00000000000000000000000000000000000000000000*
+L1452 00000000000000000000000000000000000000000000*
+L1496 11111111111111111111111111111111111111111111*
+L1540 11110111101110110111101111111111111110111111*
+L1584 00000000000000000000000000000000000000000000*
+L1628 00000000000000000000000000000000000000000000*
+L1672 00000000000000000000000000000000000000000000*
+L1716 00000000000000000000000000000000000000000000*
+L1760 00000000000000000000000000000000000000000000*
+L1804 00000000000000000000000000000000000000000000*
+L1848 00000000000000000000000000000000000000000000*
+L1892 00000000000000000000000000000000000000000000*
+L1936 00000000000000000000000000000000000000000000*
+L1980 00000000000000000000000000000000000000000000*
+L2024 00000000000000000000000000000000000000000000*
+L2068 00000000000000000000000000000000000000000000*
+L2112 00000000000000000000000000000000000000000000*
+L2156 11110111101101111011111110111111111110111111*
+L2200 11111111111111111111111111111111011111111111*
+L2244 00000000000000000000000000000000000000000000*
+L2288 00000000000000000000000000000000000000000000*
+L2332 00000000000000000000000000000000000000000000*
+L2376 00000000000000000000000000000000000000000000*
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+L2728 00000000000000000000000000000000000000000000*
+L2772 00000000000000000000000000000000000000000000*
+L2816 00000000000000000000000000000000000000000000*
+L2860 00000000000000000000000000000000000000000000*
+L2904 11111111111111111111111111111111111111111111*
+L2948 11111111111111111101111111111011111111111111*
+L2992 11111111111111111111111011110111111111111111*
+L3036 00000000000000000000000000000000000000000000*
+L3080 00000000000000000000000000000000000000000000*
+L3124 00000000000000000000000000000000000000000000*
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+L3564 00000000000000000000000000000000000000000000*
+L3608 00000000000000000000000000000000000000000000*
+L3652 11111111111111111111111111111111111111111111*
+L3696 11111111111111111101111111110111111111111111*
+L3740 11111111111111111111111111101011111111111111*
+L3784 00000000000000000000000000000000000000000000*
+L3828 00000000000000000000000000000000000000000000*
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+L4312 11111111111111111111111111111111111111111111*
+L4356 11111111111111111111111111111111111111111101*
+L4400 00000000000000000000000000000000000000000000*
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+L4752 00000000000000000000000000000000000000000000*
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+L4884 11111111111111111111111111111111111111111111*
+L4928 11111111111111111111111011111111111111111011*
+L4972 00000000000000000000000000000000000000000000*
+L5016 00000000000000000000000000000000000000000000*
+L5060 00000000000000000000000000000000000000000000*
+L5104 00000000000000000000000000000000000000000000*
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+L5368 11111111111111111111111111111111111111111111*
+L5412 11111111111111111111111011111111111111110111*
+L5456 00000000000000000000000000000000000000000000*
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+L5808 01010101111000011111*
+X0*
+V0001 XXXXXXXXXXXN1LLLHLZHHHHN*
+V0002 XXXXXXXXXXXN0LLHHLZHHHHN*
+V0003 X000011XX1XN0LLHHLZHHHHN*
+V0004 X000111XX1XN0LLHHLZHHHHN*
+V0005 X001011XX1XN0LLHHLZHHHHN*
+V0006 X001111XX1XN0LLHHLZHHHHN*
+V0007 X010011XX1XN0LLHHLZHHHHN*
+V0008 X010111XX1XN0LLHHLZHHHHN*
+V0009 X011011XX1XN0LLHHLZHHHHN*
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+V0011 X100011XX1XN0LLHHLZHHHHN*
+V0012 X100111XX1XN0LLHHLZHHHHN*
+V0013 X101011XX1XN0LLHHLZHHHHN*
+V0014 X101111XX1XN0LLHHLZHHHHN*
+V0015 X110011XX1XN0LLHHLZHHHHN*
+V0016 X110111XX1XN0LLHHLZHHHHN*
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+V0025 X011011XX0XN0LLHHLZHHHHN*
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+V0029 X101011XX0XN0LLHHLZHHHHN*
+V0030 X101111XX0XN0LLHHLZHHHHN*
+V0031 X110011XX0XN0LLHHLZHHHHN*
+V0032 X110111XX0XN0LLHHLZHHHHN*
+V0033 X111011XX0XN0LLHHLZHHHHN*
+V0034 X111111XX0XN0LLHHLZHHHHN*
+V0035 X000010XX0XN0LLHHLZHHHHN*
+V0036 X000110XX0XN0LLHHLZHHHHN*
+V0037 X001010XX0XN0LLHHLZHHHHN*
+V0038 X001110XX0XN0LLHHLZHHHHN*
+V0039 X010010XX0XN0LLHHLZHHHHN*
+V0040 X010110XX0XN0LLHHLZHHHHN*
+V0041 X011010XX0XN0LLHHLZHHHHN*
+V0042 X011110XX0XN0LLHHLZHHHHN*
+V0043 X100010XX0XN0LLHHLZHHLHN*
+V0044 X100110XX0XN0LLHHLZHLHHN*
+V0045 X101010X10XN0LLHHLHHHHHN*
+V0046 X101110X10XN0LLHHLZHHHHN*
+V0047 X110010X10XN0LLHHLZHHHHN*
+V0048 X110110X10XN0LLHHLZHHHHN*
+V0049 X111010X10XN0LLHHLZHHHHN*
+V0050 X111110X10XN0LLHHLZHHHHN*
+V0051 X000001X10XN0LLHHLZHHHHN*
+V0052 X000101X10XN0LLHHLZHHHHN*
+V0053 X001001X10XN0LLHHLZHHHHN*
+V0054 X001101X10XN0LLHHLZHHHHN*
+V0055 X010001X10XN0LLHHLZHHHHN*
+V0056 X010101X10XN0LLHHLZHHHHN*
+V0057 X011001X10XN0LLHHLZHHHHN*
+V0058 X011101X10XN0LLHHLZHHHHN*
+V0059 X100001X10XN0LLHHLZHHLHN*
+V0060 X100101X10XN0LLHHLZLHHHN*
+V0061 X101001X10XN0LLHHLZHHHLN*
+V0062 X101101X10XN0LLHHLZHHHHN*
+V0063 X110001X10XN0LLHHLZHHHHN*
+V0064 X110101X10XN0LLHHLZHHHHN*
+V0065 X111001X10XN0LLHHLZHHHHN*
+V0066 X111101X10XN0LLHHLZHHHHN*
+V0067 X111111X11XN0LLHHLZHHHHN*
+V0068 X101010X10XN0LLHHLHHHHHN*
+V0069 X101010X00XN0LLHHLLHHHHN*
+V0070 X101011X01XN0LLHHLZHHHHN*
+V0071 X101011101XN0LLHHL1HHHHN*
+V0072 C101011101XN0LLHLL1HHHHN*
+V0073 0101011101XN0LLHLL0HHHHN*
+V0074 C101011101XN0LLHHL0HHHHN*
+V0075 01010110010N0LLHHL1HHHHN*
+V0076 C1010110010N0LHHHH1HHHHN*
+V0077 01010110010N0LHHHH0HHHHN*
+V0078 C1010110010N0LLHHL0HHHHN*
+V0079 01010110010N0LLHHL0HHHHN*
+V0080 C1010110010N0LLHHL0HHHHN*
+V0081 01010110011N0LLHHL0HHHHN*
+V0082 01010110010N0LLHHL1HHHHN*
+V0083 C1010110010N0LHHHH1HHHHN*
+V0084 01010110011N0HLHHH1HHHHN*
+C75EB*
+A8A0
diff --git a/pld/decoder1.jed b/pld/decoder1.jed
new file mode 100644
index 0000000..1c92526
--- /dev/null
+++ b/pld/decoder1.jed
@@ -0,0 +1,150 @@
+
+PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE   :DECODER.PDS              AUTHOR :Walter Fetter Lages      
+PATTERN :A                        COMPANY:UFRGS                    
+REVISION:1.0                      DATE   :10/10/02                 
+
+
+PAL22V10
+DECODER*
+QP24*
+QF5828*
+G0*F0*
+L0000 00000000000000000000000000000000000000000000*
+L0044 11111111111111111111111111111111111111111111*
+L0088 11110111101101111011101111111111111110111111*
+L0132 00000000000000000000000000000000000000000000*
+L0176 00000000000000000000000000000000000000000000*
+L0220 00000000000000000000000000000000000000000000*
+L0264 00000000000000000000000000000000000000000000*
+L0308 00000000000000000000000000000000000000000000*
+L0352 00000000000000000000000000000000000000000000*
+L0396 00000000000000000000000000000000000000000000*
+L0440 11111111111111111111111111111111111111111111*
+L0484 11110111101110111011111111111111111110111111*
+L0528 00000000000000000000000000000000000000000000*
+L0572 00000000000000000000000000000000000000000000*
+L0616 00000000000000000000000000000000000000000000*
+L0660 00000000000000000000000000000000000000000000*
+L0704 00000000000000000000000000000000000000000000*
+L0748 00000000000000000000000000000000000000000000*
+L0792 00000000000000000000000000000000000000000000*
+L0836 00000000000000000000000000000000000000000000*
+L0880 00000000000000000000000000000000000000000000*
+L0924 11111111111111111111111111111111111111111111*
+L0968 11110111101110110111111110111111111110111111*
+L1012 00000000000000000000000000000000000000000000*
+L1056 00000000000000000000000000000000000000000000*
+L1100 00000000000000000000000000000000000000000000*
+L1144 00000000000000000000000000000000000000000000*
+L1188 00000000000000000000000000000000000000000000*
+L1232 00000000000000000000000000000000000000000000*
+L1276 00000000000000000000000000000000000000000000*
+L1320 00000000000000000000000000000000000000000000*
+L1364 00000000000000000000000000000000000000000000*
+L1408 00000000000000000000000000000000000000000000*
+L1452 00000000000000000000000000000000000000000000*
+L1496 11111111111111111111111111111111111111111111*
+L1540 11110111101110110111101111111111111110111111*
+L1584 00000000000000000000000000000000000000000000*
+L1628 00000000000000000000000000000000000000000000*
+L1672 00000000000000000000000000000000000000000000*
+L1716 00000000000000000000000000000000000000000000*
+L1760 00000000000000000000000000000000000000000000*
+L1804 00000000000000000000000000000000000000000000*
+L1848 00000000000000000000000000000000000000000000*
+L1892 00000000000000000000000000000000000000000000*
+L1936 00000000000000000000000000000000000000000000*
+L1980 00000000000000000000000000000000000000000000*
+L2024 00000000000000000000000000000000000000000000*
+L2068 00000000000000000000000000000000000000000000*
+L2112 00000000000000000000000000000000000000000000*
+L2156 11110111101101111011111110111111111110111111*
+L2200 11111111111111111111111111111111011111111111*
+L2244 00000000000000000000000000000000000000000000*
+L2288 00000000000000000000000000000000000000000000*
+L2332 00000000000000000000000000000000000000000000*
+L2376 00000000000000000000000000000000000000000000*
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+L2816 00000000000000000000000000000000000000000000*
+L2860 00000000000000000000000000000000000000000000*
+L2904 11111111111111111111111111111111111111111111*
+L2948 11111111111111111101111111111011111111111111*
+L2992 11111111111111111111111011110111111111111111*
+L3036 00000000000000000000000000000000000000000000*
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+L3652 11111111111111111111111111111111111111111111*
+L3696 11111111111111111101111111110111111111111111*
+L3740 11111111111111111111111111101011111111111111*
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+180F
diff --git a/pld/decoder1.pds b/pld/decoder1.pds
new file mode 100644
index 0000000..0a1596a
--- /dev/null
+++ b/pld/decoder1.pds
@@ -0,0 +1,266 @@
+
+;PALASM Design Description
+
+;---------------------------------- Declaration Segment ------------
+TITLE    DECODER.PDS
+PATTERN  A
+REVISION 1.0
+AUTHOR   Walter Fetter Lages
+COMPANY  UFRGS
+DATE     10/10/02
+
+CHIP  DECODER   PAL22V10
+
+;---------------------------------- PIN Declarations ---------------
+PIN  1          CLOCK				; INPUT
+PIN  2..5       A[19..16]			; INPUT
+PIN  6          /WR				; INPUT
+PIN  7		/RD				; INPUT
+PIN  8		D1				; INPUT
+PIN  9		REFPOS				; INPUT
+PIN  10		/STROBE				; INPUT
+PIN  11         PWM				; INPUT
+PIN  12         GND				
+PIN  13         TRINT				; INPUT
+PIN  14         DRVB		COMBINATORIAL		; OUTPUT
+PIN  15         DRVA		COMBINATORIAL		; OUTPUT
+PIN  16         /EXTINT		COMBINATORIAL		; OUTPUT
+PIN  17         /BRAKE		REGISTERED              ; OUTPUT
+PIN  18         PWMEN           REGISTERED              ; OUTPUT
+PIN  19         D0              COMBINATORIAL           ; I/O
+PIN  20		/EWR		COMBINATORIAL		; OUTPUT
+PIN  21         /ERD		COMBINATORIAL		; OUTPUT
+PIN  22         /CSPWM		COMBINATORIAL		; OUTPUT
+PIN  23         /CSLATCH	COMBINATORIAL		; OUTPUT
+PIN  24         VCC				
+
+
+;----------------------------------- Boolean Equation Segment ------
+EQUATIONS
+
+EXTINT = TRINT
+
+CSPWM= STROBE * A[19] * /A[18] * /A[17] * /A[16]  
+ERD= STROBE * RD * A[19] * /A[18] * /A[17] * A[16] 
+EWR= STROBE * WR * A[19] * /A[18] * /A[17] * A[16] 
+CSLATCH= STROBE * WR * A[19] * /A[18] * A[17] * /A[16] 
+
+D0.TRST= STROBE * RD * A[19] * /A[18] * A[17] * /A[16]
+D0=REFPOS
+
+PWMEN=D0 * /D1 + PWMEN * D1
+
+BRAKE=D0 * D1 + BRAKE * /D1
+
+DRVA=PWMEN * /PWM
+DRVB=PWMEN * PWM
+
+;----------------------------------- State Segment -----------------
+STATE
+
+CLKF = CLOCK
+
+;----------------------------------- Simulation Segment ------------
+SIMULATION
+
+; TRINT/EXTINT tests
+
+TRACE_ON TRINT EXTINT
+SETF TRINT
+CHECK EXTINT
+SETF /TRINT
+CHECK /EXTINT
+TRACE_OFF
+
+; Address decoding tests
+
+TRACE_ON A[19..16] /STROBE /RD /WR /CSPWM /ERD /EWR /CSLATCH D0
+
+SETF /A[19] /A[18] /A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] /A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] /A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] A[16] /STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+
+SETF /A[19] /A[18] /A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] /A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] /A[16] STROBE /RD /WR
+CHECK CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] /A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] A[16] STROBE /RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+
+SETF /A[19] /A[18] /A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] /A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] /A[16] STROBE RD /WR	; CSPWM active
+CHECK CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] A[16] STROBE RD /WR	; ERD active
+CHECK /CSPWM ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] A[17] /A[16] STROBE RD /WR REFPOS ; DO driving output
+CHECK /CSPWM /ERD /EWR /CSLATCH D0
+SETF A[19] /A[18] A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] /A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] A[16] STROBE RD /WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+
+SETF /A[19] /A[18] /A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] /A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] /A[18] A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] /A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /A[19] A[18] A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] /A[18] /A[17] /A[16] STROBE /RD WR
+CHECK CSPWM /ERD /EWR /CSLATCH ^D0		; CSPWM active
+SETF A[19] /A[18] /A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD EWR /CSLATCH ^D0		; EWR active
+SETF A[19] /A[18] A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR CSLATCH ^D0		; CSLATCH active
+SETF A[19] /A[18] A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] /A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] /A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF A[19] A[18] A[17] A[16] STROBE /RD WR
+CHECK /CSPWM /ERD /EWR /CSLATCH ^D0
+SETF /STROBE /RD /WR
+
+TRACE_OFF
+
+; REFPOS tests
+
+TRACE_ON A[19..16] /STROBE /RD /WR /CSPWM /ERD /EWR /CSLATCH D0  REFPOS
+
+SETF A[19] /A[18] A[17] /A[16] STROBE RD /WR REFPOS
+CHECK /CSPWM /ERD /EWR /CSLATCH D0
+SETF A[19] /A[18] A[17] /A[16] STROBE RD /WR /REFPOS
+CHECK /CSPWM /ERD /EWR /CSLATCH /D0 
+SETF /STROBE /RD /WR
+
+TRACE_OFF
+
+; BRAKE PWMEN tests
+
+TRACE_ON CLOCK D0 D1 BRAKE PWMEN
+
+SETF D0 D1
+CLOCKF CLOCK
+CHECK BRAKE
 /PWMEN
+SETF /D0 D1
+CLOCKF CLOCK
+CHECK /BRAKE
 /PWMEN
+
+SETF D0 /D1 /PWM
+CLOCKF CLOCK
+CHECK /BRAKE PWMEN DRVA /DRVB
+SETF /D0 /D1 /PWM
+CLOCKF CLOCK
+CHECK /BRAKE /PWMEN /DRVA /DRVB
+
+TRACE_OFF
+
+; DRVA/DRVB/PWM tests
+
+TRACE_ON PWMEN PWM DRVA DRVB
+
+SETF /PWM
 /D1 /D0
+CLOCKF CLOCK
+CHECK /DRVA /DRVB /PWMEN
 
+SETF PWM
+CHECK /DRVA /DRVB /PWMEN
+
+SETF /PWM
 /D1 D0
+CLOCKF CLOCK
+CHECK DRVA /DRVB PWMEN
+SETF PWM
+CHECK /DRVA DRVB PWMEN
+
+TRACE_OFF
+
+;-------------------------------------------------------------------
+
+
diff --git a/pld/decoder1.trf b/pld/decoder1.trf
new file mode 100644
index 0000000..ef8c3cb
--- /dev/null
+++ b/pld/decoder1.trf
@@ -0,0 +1,86 @@
+PALASM4  PLDSIM   - MARKET RELEASE 1.5 (7-10-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+PALASM SIMULATION SELECTIVE TRACE LISTING
+
+Title     : DECODER.PDS              Author   : Walter Fetter Lag
+Pattern   : A                        Company  : UFRGS            
+Revision  : 1.0                      Date     : 10/10/02         
+
+PAL22V10       
+Page : 1 
+
+         gg                                                          
+ TRINT   HL                                                          
+ EXTINT  HL                                                          
+
+PAL22V10       
+Page : 2 
+
+           gggggggggggggggggggggggggggggggggggggggggggggggggggggggggggg
+ A[19]     LLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLHHHHHHHHLLLLLLLLHHHH
+ A[18]     LLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLLHHHHLLLL
+ A[17]     LLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHHLLHH
+ A[16]     LHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLHLH
+/STROBE    HHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLLL
+/RD        HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLLLLLLLLLHHHHHHHHHHHH
+/WR        HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLLLLLLLLLLLL
+/CSPWM     HHHHHHHHHHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHLHHH
+/ERD       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLHHHHHHHHHHHHHHHHHH
+/EWR       HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLHH
+/CSLATCH   HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHLH
+ D0        ZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZZHZZZZZZZZZZZZZZZZZ
+
+PAL22V10       
+Page : 3 
+           ggggg                                                       
+ A[19]     HHHHH                                                       
+ A[18]     HHHHH                                                       
+ A[17]     LLHHH                                                       
+ A[16]     LHLHH                                                       
+/STROBE    LLLLH                                                       
+/RD        HHHHH                                                       
+/WR        LLLLH                                                       
+/CSPWM     HHHHH                                                       
+/ERD       HHHHH                                                       
+/EWR       HHHHH                                                       
+/CSLATCH   HHHHH                                                       
+ D0        ZZZZZ                                                       
+
+PAL22V10       
+Page : 4 
+
+           ggg                                                         
+ A[19]     HHH                                                         
+ A[18]     LLL                                                         
+ A[17]     HHH                                                         
+ A[16]     LLL                                                         
+/STROBE    LLH                                                         
+/RD        LLH                                                         
+/WR        HHH                                                         
+/CSPWM     HHH                                                         
+/ERD       HHH                                                         
+/EWR       HHH                                                         
+/CSLATCH   HHH                                                         
+ D0        HLZ                                                         
+ REFPOS    HLL                                                         
+
+PAL22V10       
+Page : 5 
+
+        gc  gc  gc  gc                                              
+ CLOCK  LHHLLHHLLHHLLHHL                                            
+ D0     HHHHLLLLHHHHLLLL                                            
+ D1     HHHHHHHHLLLLLLLL                                            
+ BRAKE  LLHHHHLLLLLLLLLL                                            
+ PWMEN  LLLLLLLLLLHHHHLL                                            
+
+PAL22V10       
+Page : 6 
+
+        gc  ggc  g                                                  
+ PWMEN  LLLLLLLHHH                                                  
+ PWM    LLLLHLLLLH                                                  
+ DRVA   LLLLLLLHHL                                                  
+ DRVB   LLLLLLLLLH                                                  
+
diff --git a/pld/decoder1.xpt b/pld/decoder1.xpt
new file mode 100644
index 0000000..a75776d
--- /dev/null
+++ b/pld/decoder1.xpt
@@ -0,0 +1,172 @@
+
+PALASM4  PAL ASSEMBLER   - MARKET RELEASE 1.5a (8-20-92)
+ (C) - COPYRIGHT ADVANCED MICRO DEVICES INC., 1992
+
+
+TITLE   :DECODER.PDS              AUTHOR :Walter Fetter Lages      
+PATTERN :A                        COMPANY:UFRGS                    
+REVISION:1.0                      DATE   :10/10/02                 
+
+PAL22V10
+DECODER
+
+                   11  1111  1111  2222  2222  2233  3333  3333  4444  
+     0123  4567  8901  2345  6789  0123  4567  8901  2345  6789  0123  
+
+0    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+1    ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+2    ----  X---  -X--  X---  -X--  -X--  ----  ----  ----  -X--  ----    
+3    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+4    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+5    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+6    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+7    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+8    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+9    XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+10   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+11   ----  X---  -X--  -X--  -X--  ----  ----  ----  ----  -X--  ----    
+12   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+13   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+14   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+15   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+16   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+17   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+18   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+19   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+20   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+21   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+22   ----  X---  -X--  -X--  X---  ----  -X--  ----  ----  -X--  ----    
+23   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+24   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+25   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+26   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+27   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+28   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+29   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+30   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+31   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+32   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+33   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+34   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+35   ----  X---  -X--  -X--  X---  -X--  ----  ----  ----  -X--  ----    
+36   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+37   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+38   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+39   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+40   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+41   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+42   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+43   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+44   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+45   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+46   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+47   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+48   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+49   ----  X---  -X--  X---  -X--  ----  -X--  ----  ----  -X--  ----    
+50   ----  ----  ----  ----  ----  ----  ----  ----  X---  ----  ----    
+51   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+52   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+53   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+54   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+55   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+56   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+57   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+58   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+59   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+60   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+61   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+62   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+63   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+64   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+65   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+66   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+67   ----  ----  ----  ----  --X-  ----  ----  -X--  ----  ----  ----    
+68   ----  ----  ----  ----  ----  ---X  ----  X---  ----  ----  ----    
+69   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+70   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+71   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+72   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+73   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+74   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+75   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+76   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+77   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+78   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+79   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+80   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+81   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+82   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+83   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+84   ----  ----  ----  ----  --X-  ----  ----  X---  ----  ----  ----    
+85   ----  ----  ----  ----  ----  ----  ---X  -X--  ----  ----  ----    
+86   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+87   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+88   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+89   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+90   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+91   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+92   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+93   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+94   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+95   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+96   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+97   XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+98   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+99   ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  --X-    
+100  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+101  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+102  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+103  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+104  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+105  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+106  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+107  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+108  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+109  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+110  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+111  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+112  ----  ----  ----  ----  ----  ---X  ----  ----  ----  ----  -X--    
+113  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+114  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+115  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+116  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+117  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+118  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+119  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+120  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+121  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+122  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----  ----    
+123  ----  ----  ----  ----  ----  ---X  ----  ----  ----  ----  X---    
+124  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+125  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+126  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+127  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+128  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+129  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+130  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+131  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX  XXXX    
+
+ SUMMARY
+ -------
+
+      OUTPUT PINS:           1111112222
+                             4567890123
+    POLARITY FUSES:          --XX--XXXX
+
+      OUTPUT PINS:           1111112222
+                             4567890123
+    REG BYPASS FUSES:        ---XX-----
+
+      TOTAL FUSES BLOWN    = 937
+
diff --git a/pld/palasm2.tre b/pld/palasm2.tre
new file mode 100644
index 0000000..a9c4cb9
--- /dev/null
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@@ -0,0 +1,1852 @@
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