From: Walter Fetter Lages Date: Tue, 22 May 2018 18:35:30 +0000 (-0300) Subject: Reworked sorce tree. X-Git-Tag: v2.3.0^0 X-Git-Url: http://git.ece.ufrgs.br/?a=commitdiff_plain;h=7bfa8d3303dc94b0805079f10f0745cc93dd335a;p=aic.git Reworked sorce tree. Reworked source tree. Capacitor involucre sizes made invisible in schematics. Created a workaround to fix a incompatibility between pic30-gcc 3.01 and FreeRTOS. See the hack 1 in the Hacks file. --- diff --git a/Changes b/Changes index bba6b55..83eb549 100644 --- a/Changes +++ b/Changes @@ -1,3 +1,20 @@ +2012.04.20 Started aic-2.3.0. + Reworked source tree. + Capacitor involucre sizes made invisible in schematics. + Created a workaround to fix a incompatibility between + pic30-gcc 3.01 and FreeRTOS. See the hack 1 in the Hacks + file. + +2009.02.09 Started aic-2.2.0. + aic-2.2.* uses the irs21094 MOSFET driver. + +2008.08.26 Started aic-2.1.0. + aic-2.1.* uses the LT1162 MOSFET driver. + +2006.06.11 Started aic-2.0.0. + aic-2.*.* uses the dsPIC30F4012 processor. + aic-2.0.* uses the MAX5062 MOSFET driver. + 2006.06.11 Inicio do projeto aic-2.0.0 2008.02.15 Incluido destrutor virtual na classe AIC_COMM. @@ -265,3 +282,5 @@ Criadas classes HostUDP e HostCAN, derivadas de Host. +2002.xx.xx Started aic-1.0.0. + aic-1.0.0 uses the TINI DS390 processor. \ No newline at end of file diff --git a/Daemon/Makefile b/Daemon/Makefile index be22b55..10f0603 100644 --- a/Daemon/Makefile +++ b/Daemon/Makefile @@ -6,7 +6,7 @@ daemon.o:daemon.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) -I. $(CCFLAGS) daemon:daemon.o - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLDFILE) $(AICLIB) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLD) $(AICLIB) daemon.hex:daemon $(CCBIN2HEX) $^ diff --git a/DaemonRTOS/Makefile b/DaemonRTOS/Makefile index 89c6e78..6d4c8d8 100644 --- a/DaemonRTOS/Makefile +++ b/DaemonRTOS/Makefile @@ -7,7 +7,7 @@ daemonrtos.hex:daemonrtos $(CCBIN2HEX) $^ daemonrtos:daemonrtos.o $(OSOBJS) - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLDFILE) $(AICLIB) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLD) $(AICLIB) daemonrtos.o:daemonrtos.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) $(OSINCDIR) $(CCFLAGS) $(OSFLAGS) diff --git a/FreeRTOS/croutine.c b/FreeRTOS1/croutine.c similarity index 100% rename from FreeRTOS/croutine.c rename to FreeRTOS1/croutine.c diff --git a/FreeRTOS/include/FreeRTOS.h b/FreeRTOS1/include/FreeRTOS.h similarity index 100% rename from FreeRTOS/include/FreeRTOS.h rename to FreeRTOS1/include/FreeRTOS.h diff --git a/FreeRTOS/include/croutine.h b/FreeRTOS1/include/croutine.h similarity index 100% rename from FreeRTOS/include/croutine.h rename to FreeRTOS1/include/croutine.h diff --git a/FreeRTOS/include/list.h b/FreeRTOS1/include/list.h similarity index 100% rename from FreeRTOS/include/list.h rename to FreeRTOS1/include/list.h diff --git a/FreeRTOS/include/portable.h b/FreeRTOS1/include/portable.h similarity index 100% rename from FreeRTOS/include/portable.h rename to FreeRTOS1/include/portable.h diff --git a/FreeRTOS/include/projdefs.h b/FreeRTOS1/include/projdefs.h similarity index 100% rename from FreeRTOS/include/projdefs.h rename to FreeRTOS1/include/projdefs.h diff --git a/FreeRTOS/include/queue.h b/FreeRTOS1/include/queue.h similarity index 100% rename from FreeRTOS/include/queue.h rename to FreeRTOS1/include/queue.h diff --git a/FreeRTOS/include/semphr.h b/FreeRTOS1/include/semphr.h similarity index 100% rename from FreeRTOS/include/semphr.h rename to FreeRTOS1/include/semphr.h diff --git a/FreeRTOS/include/task.h b/FreeRTOS1/include/task.h similarity index 100% rename from FreeRTOS/include/task.h rename to FreeRTOS1/include/task.h diff --git a/FreeRTOS/list.c b/FreeRTOS1/list.c similarity index 100% rename from FreeRTOS/list.c rename to FreeRTOS1/list.c diff --git a/FreeRTOS/portable/AIC-2.0.0/port.c b/FreeRTOS1/portable/AIC-2.0.0/port.c similarity index 100% rename from FreeRTOS/portable/AIC-2.0.0/port.c rename to FreeRTOS1/portable/AIC-2.0.0/port.c diff --git a/FreeRTOS/portable/AIC-2.0.0/portmacro.h b/FreeRTOS1/portable/AIC-2.0.0/portmacro.h similarity index 100% rename from FreeRTOS/portable/AIC-2.0.0/portmacro.h rename to FreeRTOS1/portable/AIC-2.0.0/portmacro.h diff --git a/FreeRTOS/portable/MemMang/heap_1.c b/FreeRTOS1/portable/MemMang/heap_1.c similarity index 100% rename from FreeRTOS/portable/MemMang/heap_1.c rename to FreeRTOS1/portable/MemMang/heap_1.c diff --git a/FreeRTOS/portable/MemMang/heap_2.c b/FreeRTOS1/portable/MemMang/heap_2.c similarity index 100% rename from FreeRTOS/portable/MemMang/heap_2.c rename to FreeRTOS1/portable/MemMang/heap_2.c diff --git a/FreeRTOS/portable/MemMang/heap_3.c b/FreeRTOS1/portable/MemMang/heap_3.c similarity index 100% rename from FreeRTOS/portable/MemMang/heap_3.c rename to FreeRTOS1/portable/MemMang/heap_3.c diff --git a/FreeRTOS/portable/readme.txt b/FreeRTOS1/portable/readme.txt similarity index 100% rename from FreeRTOS/portable/readme.txt rename to FreeRTOS1/portable/readme.txt diff --git a/FreeRTOS/queue.c b/FreeRTOS1/queue.c similarity index 100% rename from FreeRTOS/queue.c rename to FreeRTOS1/queue.c diff --git a/FreeRTOS/readme.txt b/FreeRTOS1/readme.txt similarity index 100% rename from FreeRTOS/readme.txt rename to FreeRTOS1/readme.txt diff --git a/FreeRTOS/tasks.c b/FreeRTOS1/tasks.c similarity index 100% rename from FreeRTOS/tasks.c rename to FreeRTOS1/tasks.c diff --git a/Hacks b/Hacks new file mode 100644 index 0000000..6ae369a --- /dev/null +++ b/Hacks @@ -0,0 +1,27 @@ +1. Imcompatibility between pic30-gcc 3.01 and FreeRTOS 4.7.2 and above + +There is an incompatibility between the current pic30-gcc version and the +FreeRTOS regarding the setting of the prescaler for the T1 timer in +FreeRTOS/Source/portable/MPLAB/PIC24_dsPIC/port.c. + +FreeRTOS wants to set the TCKPS0 and TCKPS1 bits as 1-bit fields, while +pic30-gcc defines in /usr/lib/gcc/pic30-elf/3.01/include/p30f4012.h the +T1CONbits structure with a 2-bit field named TCKPS. + +Since FreeRTOS uses an 8x prescaler (TCKPS0=1, TCKPS1=0 or TCKPS=1), the +hack is to define -DTCKPS0=TCKPS -DTCKPS1=TSYNC in the compiler options. + +Hence the FreeRTOS code: + +T1CONbits.TCKPS0 = 1; +T1CONbits.TCKPS1 = 0; + +is seen by the compiler as + +T1CONbits.TCKPS = 1; +T1CONbits.TSYNC = 0; + +Note that TSYNC is initialized by the hardware as 0 and is not touched by +FreeRTOS. Therefore, the above code should be harmless. + +------------------------------------------------------------------------- diff --git a/Makefile b/Makefile index f8481cd..2d510f5 100644 --- a/Makefile +++ b/Makefile @@ -1,4 +1,4 @@ -export AICROOT=$(HOME)/src/aic +export AICROOT=$(PWD) export CC=pic30-elf-gcc export CCAR=pic30-elf-ar @@ -6,15 +6,16 @@ export CCBIN2HEX=pic30-elf-bin2hex export CCFLAGS=-Wall -O2 -fomit-frame-pointer -fno-schedule-insns -fno-schedule-insns2 export CPU=-mcpu=30F4012 export CCINCDIR=-I$(AICROOT)/include -export CCLIBDIR=-L/usr/pic30-elf/ -export CCGLDDIR=$(AICROOT)/gld -export CCGLDFILE=-T $(CCGLDDIR)/p30f4012.gld +export CCLIBDIR= +export CCGLD=-T p30f4012.gld -export OSROOT=$(AICROOT)/FreeRTOS -export OSFILES=$(OSROOT)/list.c $(OSROOT)/queue.c $(OSROOT)/tasks.c $(OSROOT)/croutine.c $(OSROOT)/portable/AIC-2.0.0/port.c $(OSROOT)/portable/MemMang/heap_1.c +export OSROOT=/usr/src/FreeRTOS/Source +export OSFILES=$(OSROOT)/list.c $(OSROOT)/queue.c $(OSROOT)/tasks.c \ + $(OSROOT)/croutine.c $(OSROOT)/portable/MPLAB/PIC24_dsPIC/port.c \ + $(OSROOT)/portable/MemMang/heap_1.c export OSOBJS=list.o queue.o tasks.o croutine.o port.o heap_1.o -export OSINCDIR=-I$(OSROOT)/include -I$(OSROOT)/portable/AIC-2.0.0/ -export OSFLAGS=-DAIC_DSPIC_PORT +export OSINCDIR=-I$(OSROOT)/include -I$(OSROOT)/portable/MPLAB/PIC24_ds_PIC +export OSFLAGS=-DMPLAB_DSPIC_PORT -DTCKPS0=TCKPS -DTCKPS1=TSYNC export AICLIBDIR=-L$(AICROOT)/lib diff --git a/TODO b/TODO new file mode 100644 index 0000000..f9f5558 --- /dev/null +++ b/TODO @@ -0,0 +1 @@ +Update freeRTOS. diff --git a/aictable b/aictable deleted file mode 100644 index cb42d8f..0000000 --- a/aictable +++ /dev/null @@ -1,8 +0,0 @@ -size of char... 1 -size of short... 2 -size of int... 2 -size of long... 4 -size of long long... 8 -size of float... 4 -size of double... 4 -int 0x0733 byte[0]:33 byte[1]:7 \ No newline at end of file diff --git a/doc/Doxyfile b/doc/Doxyfile new file mode 100644 index 0000000..42ea63c --- /dev/null +++ b/doc/Doxyfile @@ -0,0 +1,1143 @@ +# Doxyfile 1.3.7 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project +# +# All text after a hash (#) is considered a comment and will be ignored +# The format is: +# TAG = value [value, ...] +# For lists items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (" ") + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded +# by quotes) that should identify the project. + +PROJECT_NAME = "Actuator Interface Card" + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. +# This could be handy for archiving the generated documentation or +# if some version control system is used. + +PROJECT_NUMBER = "2.3.0" + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) +# base path where the generated documentation will be put. +# If a relative path is entered, it will be relative to the location +# where doxygen was started. If left blank the current directory will be used. + +OUTPUT_DIRECTORY = . + +# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create +# 2 levels of 10 sub-directories under the output directory of each output +# format and will distribute the generated files over these directories. +# Enabling this option can be useful when feeding doxygen a huge amount of source +# files, where putting all generated files in the same directory would otherwise +# cause performance problems for the file system. + +CREATE_SUBDIRS = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# The default language is English, other supported languages are: +# Brazilian, Catalan, Chinese, Chinese-Traditional, Croatian, Czech, Danish, Dutch, +# Finnish, French, German, Greek, Hungarian, Italian, Japanese, Japanese-en +# (Japanese with English messages), Korean, Korean-en, Norwegian, Polish, Portuguese, +# Romanian, Russian, Serbian, Slovak, Slovene, Spanish, Swedish, and Ukrainian. + +OUTPUT_LANGUAGE = English + +# This tag can be used to specify the encoding used in the generated output. +# The encoding is not always determined by the language that is chosen, +# but also whether or not the output is meant for Windows or non-Windows users. +# In case there is a difference, setting the USE_WINDOWS_ENCODING tag to YES +# forces the Windows encoding (this is the default for the Windows binary), +# whereas setting the tag to NO uses a Unix-style encoding (the default for +# all platforms other than Windows). + +USE_WINDOWS_ENCODING = NO + +# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will +# include brief member descriptions after the members that are listed in +# the file and class documentation (similar to JavaDoc). +# Set to NO to disable this. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend +# the brief description of a member or function before the detailed description. +# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator +# that is used to form the text in various listings. Each string +# in this list, if found as the leading text of the brief description, will be +# stripped from the text and the result after processing the whole list, is used +# as the annotated text. Otherwise, the brief description is used as-is. If left +# blank, the following values are used ("$name" is automatically replaced with the +# name of the entity): "The $name class" "The $name widget" "The $name file" +# "is" "provides" "specifies" "contains" "represents" "a" "an" "the" + +ABBREVIATE_BRIEF = + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# Doxygen will generate a detailed section even if there is only a brief +# description. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all inherited +# members of a class in the documentation of that class as if those members were +# ordinary class members. Constructors, destructors and assignment operators of +# the base classes will not be shown. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full +# path before files name in the file list and in the header files. If set +# to NO the shortest path that makes the file name unique will be used. + +FULL_PATH_NAMES = NO + +# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag +# can be used to strip a user-defined part of the path. Stripping is +# only done if one of the specified strings matches the left-hand part of +# the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the +# path to strip. + +STRIP_FROM_PATH = .. + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of +# the path mentioned in the documentation of a class, which tells +# the reader which header file to include in order to use a class. +# If left blank only the name of the header file containing the class +# definition is used. Otherwise one should specify the include paths that +# are normally passed to the compiler using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter +# (but less readable) file names. This can be useful is your file systems +# doesn't support long names like on DOS, Mac, or CD-ROM. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen +# will interpret the first line (until the first dot) of a JavaDoc-style +# comment as the brief description. If set to NO, the JavaDoc +# comments will behave just like the Qt-style comments (thus requiring an +# explicit @brief command for a brief description. + +JAVADOC_AUTOBRIEF = YES + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen +# treat a multi-line C++ special comment block (i.e. a block of //! or /// +# comments) as a brief description. This used to be the default behaviour. +# The new default is to treat a multi-line C++ comment block as a detailed +# description. Set this tag to YES if you prefer the old behaviour instead. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the DETAILS_AT_TOP tag is set to YES then Doxygen +# will output the detailed description near the top, like JavaDoc. +# If set to NO, the detailed description appears after the member +# documentation. + +DETAILS_AT_TOP = YES + +# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented +# member inherits the documentation from any documented member that it +# re-implements. + +INHERIT_DOCS = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES, then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. + +DISTRIBUTE_GROUP_DOC = YES + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. +# Doxygen uses this value to replace tabs by spaces in code fragments. + +TAB_SIZE = 8 + +# This tag can be used to specify a number of aliases that acts +# as commands in the documentation. An alias has the form "name=value". +# For example adding "sideeffect=\par Side Effects:\n" will allow you to +# put the command \sideeffect (or @sideeffect) in the documentation, which +# will result in a user-defined paragraph with heading "Side Effects:". +# You can put \n's in the value part of an alias to insert newlines. + +ALIASES = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. +# For instance, some of the names that are used will be different. The list +# of all members will be omitted, etc. + +OPTIMIZE_OUTPUT_FOR_C = NO + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java sources +# only. Doxygen will then generate output that is more tailored for Java. +# For instance, namespaces will be presented as packages, qualified scopes +# will look different, etc. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the SUBGROUPING tag to YES (the default) to allow class member groups of +# the same type (for instance a group of public functions) to be put as a +# subgroup of that type (e.g. under the Public Functions section). Set it to +# NO to prevent subgrouping. Alternatively, this can be done per class using +# the \nosubgrouping command. + +SUBGROUPING = YES + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in +# documentation are documented, even if no documentation was available. +# Private class members and static file members will be hidden unless +# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES + +EXTRACT_ALL = NO + +# If the EXTRACT_PRIVATE tag is set to YES all private members of a class +# will be included in the documentation. + +EXTRACT_PRIVATE = NO + +# If the EXTRACT_STATIC tag is set to YES all static members of a file +# will be included in the documentation. + +EXTRACT_STATIC = NO + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) +# defined locally in source files will be included in the documentation. +# If set to NO only classes defined in header files are included. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. When set to YES local +# methods, which are defined in the implementation section but not in +# the interface are included in the documentation. +# If set to NO (the default) only methods in the interface are included. + +EXTRACT_LOCAL_METHODS = YES + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all +# undocumented members of documented classes, files or namespaces. +# If set to NO (the default) these members will be included in the +# various overviews, but no documentation section is generated. +# This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. +# If set to NO (the default) these classes will be included in the various +# overviews. This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all +# friend (class|struct|union) declarations. +# If set to NO (the default) these declarations will be included in the +# documentation. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any +# documentation blocks found inside the body of a function. +# If set to NO (the default) these blocks will be appended to the +# function's detailed documentation block. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation +# that is typed after a \internal command is included. If the tag is set +# to NO (the default) then the documentation will be excluded. +# Set it to YES to include the internal documentation. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate +# file names in lower-case letters. If set to YES upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# users are advised to set this option to NO. + +CASE_SENSE_NAMES = YES + +# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen +# will show members with their full class and namespace scopes in the +# documentation. If set to YES the scope will be hidden. + +HIDE_SCOPE_NAMES = NO + +# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen +# will put a list of the files that are included by a file in the documentation +# of that file. + +SHOW_INCLUDE_FILES = YES + +# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] +# is inserted in the documentation for inline members. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen +# will sort the (detailed) documentation of file and class members +# alphabetically by member name. If set to NO the members will appear in +# declaration order. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the +# brief documentation of file, namespace and class members alphabetically +# by member name. If set to NO (the default) the members will appear in +# declaration order. + +SORT_BRIEF_DOCS = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be +# sorted by fully-qualified names, including namespaces. If set to +# NO (the default), the class list will be sorted only by class name, +# not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the +# alphabetical list. + +SORT_BY_SCOPE_NAME = YES + +# The GENERATE_TODOLIST tag can be used to enable (YES) or +# disable (NO) the todo list. This list is created by putting \todo +# commands in the documentation. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable (YES) or +# disable (NO) the test list. This list is created by putting \test +# commands in the documentation. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable (YES) or +# disable (NO) the bug list. This list is created by putting \bug +# commands in the documentation. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or +# disable (NO) the deprecated list. This list is created by putting +# \deprecated commands in the documentation. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional +# documentation sections, marked by \if sectionname ... \endif. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines +# the initial value of a variable or define consists of for it to appear in +# the documentation. If the initializer consists of more lines than specified +# here it will be hidden. Use a value of 0 to hide initializers completely. +# The appearance of the initializer of individual variables and defines in the +# documentation can be controlled using \showinitializer or \hideinitializer +# command in the documentation regardless of this setting. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated +# at the bottom of the documentation of classes and structs. If set to YES the +# list will mention the files that were used to generate the documentation. + +SHOW_USED_FILES = YES + +#--------------------------------------------------------------------------- +# configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated +# by doxygen. Possible values are YES and NO. If left blank NO is used. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated by doxygen. Possible values are YES and NO. If left blank +# NO is used. + +WARNINGS = YES + +# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings +# for undocumented members. If EXTRACT_ALL is set to YES then this flag will +# automatically be disabled. + +WARN_IF_UNDOCUMENTED = YES + +# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some +# parameters in a documented function, or documenting parameters that +# don't exist or using markup commands wrongly. + +WARN_IF_DOC_ERROR = YES + +# The WARN_FORMAT tag determines the format of the warning messages that +# doxygen can produce. The string should contain the $file, $line, and $text +# tags, which will be replaced by the file and line number from which the +# warning originated and the warning text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning +# and error messages should be written. If left blank the output is written +# to stderr. + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag can be used to specify the files and/or directories that contain +# documented source files. You may enter file names like "myfile.cpp" or +# directories like "/usr/src/myproject". Separate the files or directories +# with spaces. + +INPUT = . \ + ../include + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank the following patterns are tested: +# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx *.hpp +# *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm + +FILE_PATTERNS = *.dox *.h *.inc *.java + +# The RECURSIVE tag can be used to turn specify whether or not subdirectories +# should be searched for input files as well. Possible values are YES and NO. +# If left blank NO is used. + +RECURSIVE = YES + +# The EXCLUDE tag can be used to specify files and/or directories that should +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. + +EXCLUDE = + +# The EXCLUDE_SYMLINKS tag can be used select whether or not files or directories +# that are symbolic links (a Unix filesystem feature) are excluded from the input. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. + +EXCLUDE_PATTERNS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or +# directories that contain example code fragments that are included (see +# the \include command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank all files are included. + +EXAMPLE_PATTERNS = + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude +# commands irrespective of the value of the RECURSIVE tag. +# Possible values are YES and NO. If left blank NO is used. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or +# directories that contain image that are included in the documentation (see +# the \image command). + +IMAGE_PATH = + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command , where +# is the value of the INPUT_FILTER tag, and is the name of an +# input file. Doxygen will then use the output that the filter program writes +# to standard output. + +INPUT_FILTER = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will be used to filter the input files when producing source +# files to browse (i.e. when SOURCE_BROWSER is set to YES). + +FILTER_SOURCE_FILES = NO + +#--------------------------------------------------------------------------- +# configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will +# be generated. Documented entities will be cross-referenced with these sources. +# Note: To get rid of all source code in the generated output, make sure also +# VERBATIM_HEADERS is set to NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body +# of functions and classes directly in the documentation. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct +# doxygen to hide any special comment blocks from generated source code +# fragments. Normal C and C++ comments will always remain visible. + +STRIP_CODE_COMMENTS = YES + +# If the REFERENCED_BY_RELATION tag is set to YES (the default) +# then for each documented function all documented +# functions referencing it will be listed. + +REFERENCED_BY_RELATION = YES + +# If the REFERENCES_RELATION tag is set to YES (the default) +# then for each documented function all documented entities +# called/used by that function will be listed. + +REFERENCES_RELATION = YES + +# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen +# will generate a verbatim copy of the header file for each class for +# which an include is specified. Set to NO to disable this. + +VERBATIM_HEADERS = NO + +#--------------------------------------------------------------------------- +# configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index +# of all compounds will be generated. Enable this if the project +# contains a lot of classes, structs, unions or interfaces. + +ALPHABETICAL_INDEX = NO + +# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then +# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns +# in which this list will be split (can be a number in the range [1..20]) + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all +# classes will be put under the same header in the alphabetical index. +# The IGNORE_PREFIX tag can be used to specify one or more prefixes that +# should be ignored while generating the index headers. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES (the default) Doxygen will +# generate HTML output. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `html' will be used as the default path. + +HTML_OUTPUT = html + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for +# each generated HTML page (for example: .htm,.php,.asp). If it is left blank +# doxygen will generate files with .html extension. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a personal HTML header for +# each generated HTML page. If it is left blank doxygen will generate a +# standard header. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a personal HTML footer for +# each generated HTML page. If it is left blank doxygen will generate a +# standard footer. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading +# style sheet that is used by each HTML page. It can be used to +# fine-tune the look of the HTML output. If the tag is left blank doxygen +# will generate a default style sheet. Note that doxygen will try to copy +# the style sheet file to the HTML output directory, so don't put your own +# stylesheet in the HTML output directory as well, or it will be erased! + +HTML_STYLESHEET = + +# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, +# files or namespaces will be aligned in HTML using tables. If set to +# NO a bullet list will be used. + +HTML_ALIGN_MEMBERS = YES + +# If the GENERATE_HTMLHELP tag is set to YES, additional index files +# will be generated that can be used as input for tools like the +# Microsoft HTML help workshop to generate a compressed HTML help file (.chm) +# of the generated HTML documentation. + +GENERATE_HTMLHELP = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can +# be used to specify the file name of the resulting .chm file. You +# can add a path in front of the file if the result should not be +# written to the html output directory. + +CHM_FILE = + +# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can +# be used to specify the location (absolute path including file name) of +# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run +# the HTML help compiler on the generated index.hhp. + +HHC_LOCATION = + +# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag +# controls if a separate .chi index file is generated (YES) or that +# it should be included in the master .chm file (NO). + +GENERATE_CHI = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag +# controls whether a binary table of contents is generated (YES) or a +# normal table of contents (NO) in the .chm file. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members +# to the contents of the HTML help documentation and to the tree view. + +TOC_EXPAND = NO + +# The DISABLE_INDEX tag can be used to turn on/off the condensed index at +# top of each HTML page. The value NO (the default) enables the index and +# the value YES disables it. + +DISABLE_INDEX = NO + +# This tag can be used to set the number of enum values (range [1..20]) +# that doxygen will group on one line in the generated HTML documentation. + +ENUM_VALUES_PER_LINE = 4 + +# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be +# generated containing a tree-like index structure (just like the one that +# is generated for HTML Help). For this to work a browser that supports +# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, +# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are +# probably better off using the HTML help feature. + +GENERATE_TREEVIEW = YES + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be +# used to set the initial width (in pixels) of the frame in which the tree +# is shown. + +TREEVIEW_WIDTH = 250 + +#--------------------------------------------------------------------------- +# configuration options related to the LaTeX output +#--------------------------------------------------------------------------- + +# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will +# generate Latex output. + +GENERATE_LATEX = NO + +# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `latex' will be used as the default path. + +LATEX_OUTPUT = latex + +# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be +# invoked. If left blank `latex' will be used as the default command name. + +LATEX_CMD_NAME = latex + +# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to +# generate index for LaTeX. If left blank `makeindex' will be used as the +# default command name. + +MAKEINDEX_CMD_NAME = makeindex + +# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact +# LaTeX documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_LATEX = NO + +# The PAPER_TYPE tag can be used to set the paper type that is used +# by the printer. Possible values are: a4, a4wide, letter, legal and +# executive. If left blank a4wide will be used. + +PAPER_TYPE = a4wide + +# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX +# packages that should be included in the LaTeX output. + +EXTRA_PACKAGES = + +# The LATEX_HEADER tag can be used to specify a personal LaTeX header for +# the generated latex document. The header should contain everything until +# the first chapter. If it is left blank doxygen will generate a +# standard header. Notice: only use this tag if you know what you are doing! + +LATEX_HEADER = + +# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated +# is prepared for conversion to pdf (using ps2pdf). The pdf file will +# contain links (just like the HTML output) instead of page references +# This makes the output suitable for online browsing using a pdf viewer. + +PDF_HYPERLINKS = YES + +# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of +# plain latex in the generated Makefile. Set this option to YES to get a +# higher quality PDF documentation. + +USE_PDFLATEX = YES + +# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. +# command to the generated LaTeX files. This will instruct LaTeX to keep +# running if errors occur, instead of asking the user for help. +# This option is also used when generating formulas in HTML. + +LATEX_BATCHMODE = YES + +# If LATEX_HIDE_INDICES is set to YES then doxygen will not +# include the index chapters (such as File Index, Compound Index, etc.) +# in the output. + +LATEX_HIDE_INDICES = NO + +#--------------------------------------------------------------------------- +# configuration options related to the RTF output +#--------------------------------------------------------------------------- + +# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output +# The RTF output is optimized for Word 97 and may not look very pretty with +# other RTF readers or editors. + +GENERATE_RTF = NO + +# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `rtf' will be used as the default path. + +RTF_OUTPUT = rtf + +# If the COMPACT_RTF tag is set to YES Doxygen generates more compact +# RTF documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_RTF = NO + +# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated +# will contain hyperlink fields. The RTF file will +# contain links (just like the HTML output) instead of page references. +# This makes the output suitable for online browsing using WORD or other +# programs which support those fields. +# Note: wordpad (write) and others do not support links. + +RTF_HYPERLINKS = NO + +# Load stylesheet definitions from file. Syntax is similar to doxygen's +# config file, i.e. a series of assignments. You only have to provide +# replacements, missing definitions are set to their default value. + +RTF_STYLESHEET_FILE = + +# Set optional variables used in the generation of an rtf document. +# Syntax is similar to doxygen's config file. + +RTF_EXTENSIONS_FILE = + +#--------------------------------------------------------------------------- +# configuration options related to the man page output +#--------------------------------------------------------------------------- + +# If the GENERATE_MAN tag is set to YES (the default) Doxygen will +# generate man pages + +GENERATE_MAN = NO + +# The MAN_OUTPUT tag is used to specify where the man pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `man' will be used as the default path. + +MAN_OUTPUT = man + +# The MAN_EXTENSION tag determines the extension that is added to +# the generated man pages (default is the subroutine's section .3) + +MAN_EXTENSION = .3 + +# If the MAN_LINKS tag is set to YES and Doxygen generates man output, +# then it will generate one additional man file for each entity +# documented in the real man page(s). These additional files +# only source the real man page, but without them the man command +# would be unable to find the correct page. The default is NO. + +MAN_LINKS = NO + +#--------------------------------------------------------------------------- +# configuration options related to the XML output +#--------------------------------------------------------------------------- + +# If the GENERATE_XML tag is set to YES Doxygen will +# generate an XML file that captures the structure of +# the code including all documentation. + +GENERATE_XML = NO + +# The XML_OUTPUT tag is used to specify where the XML pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `xml' will be used as the default path. + +XML_OUTPUT = xml + +# The XML_SCHEMA tag can be used to specify an XML schema, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_SCHEMA = + +# The XML_DTD tag can be used to specify an XML DTD, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_DTD = + +# If the XML_PROGRAMLISTING tag is set to YES Doxygen will +# dump the program listings (including syntax highlighting +# and cross-referencing information) to the XML output. Note that +# enabling this will significantly increase the size of the XML output. + +XML_PROGRAMLISTING = YES + +#--------------------------------------------------------------------------- +# configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- + +# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will +# generate an AutoGen Definitions (see autogen.sf.net) file +# that captures the structure of the code including all +# documentation. Note that this feature is still experimental +# and incomplete at the moment. + +GENERATE_AUTOGEN_DEF = NO + +#--------------------------------------------------------------------------- +# configuration options related to the Perl module output +#--------------------------------------------------------------------------- + +# If the GENERATE_PERLMOD tag is set to YES Doxygen will +# generate a Perl module file that captures the structure of +# the code including all documentation. Note that this +# feature is still experimental and incomplete at the +# moment. + +GENERATE_PERLMOD = NO + +# If the PERLMOD_LATEX tag is set to YES Doxygen will generate +# the necessary Makefile rules, Perl scripts and LaTeX code to be able +# to generate PDF and DVI output from the Perl module output. + +PERLMOD_LATEX = NO + +# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be +# nicely formatted so it can be parsed by a human reader. This is useful +# if you want to understand what is going on. On the other hand, if this +# tag is set to NO the size of the Perl module output will be much smaller +# and Perl will parse it just the same. + +PERLMOD_PRETTY = YES + +# The names of the make variables in the generated doxyrules.make file +# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. +# This is useful so different doxyrules.make files included by the same +# Makefile don't overwrite each other's variables. + +PERLMOD_MAKEVAR_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- + +# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will +# evaluate all C-preprocessor directives found in the sources and include +# files. + +ENABLE_PREPROCESSING = YES + +# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro +# names in the source code. If set to NO (the default) only conditional +# compilation will be performed. Macro expansion can be done in a controlled +# way by setting EXPAND_ONLY_PREDEF to YES. + +MACRO_EXPANSION = YES + +# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES +# then the macro expansion is limited to the macros specified with the +# PREDEFINED and EXPAND_AS_PREDEFINED tags. + +EXPAND_ONLY_PREDEF = YES + +# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files +# in the INCLUDE_PATH (see below) will be search if a #include is found. + +SEARCH_INCLUDES = YES + +# The INCLUDE_PATH tag can be used to specify one or more directories that +# contain include files that are not input files but should be processed by +# the preprocessor. + +INCLUDE_PATH = ../include + +# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard +# patterns (like *.h and *.hpp) to filter out the header-files in the +# directories. If left blank, the patterns specified with FILE_PATTERNS will +# be used. + +INCLUDE_FILE_PATTERNS = + +# The PREDEFINED tag can be used to specify one or more macro names that +# are defined before the preprocessor is started (similar to the -D option of +# gcc). The argument of the tag is a list of macros of the form: name +# or name=definition (no spaces). If the definition and the = are +# omitted =1 is assumed. + +PREDEFINED = + +# If the MACRO_EXPANSION and EXPAND_ONLY_PREDEF tags are set to YES then +# this tag can be used to specify a list of macro names that should be expanded. +# The macro definition that is found in the sources will be used. +# Use the PREDEFINED tag if you want to use a different macro definition. + +EXPAND_AS_DEFINED = + +# If the SKIP_FUNCTION_MACROS tag is set to YES (the default) then +# doxygen's preprocessor will remove all function-like macros that are alone +# on a line, have an all uppercase name, and do not end with a semicolon. Such +# function macros are typically used for boiler-plate code, and will confuse the +# parser if not removed. + +SKIP_FUNCTION_MACROS = YES + +#--------------------------------------------------------------------------- +# Configuration::additions related to external references +#--------------------------------------------------------------------------- + +# The TAGFILES option can be used to specify one or more tagfiles. +# Optionally an initial location of the external documentation +# can be added for each tagfile. The format of a tag file without +# this location is as follows: +# TAGFILES = file1 file2 ... +# Adding location for the tag files is done as follows: +# TAGFILES = file1=loc1 "file2 = loc2" ... +# where "loc1" and "loc2" can be relative or absolute paths or +# URLs. If a location is present for each tag, the installdox tool +# does not have to be run to correct the links. +# Note that each tag file must have a unique name +# (where the name does NOT include the path) +# If a tag file is not located in the directory in which doxygen +# is run, you must also specify the path to the tagfile here. + +TAGFILES = + +# When a file name is specified after GENERATE_TAGFILE, doxygen will create +# a tag file that is based on the input files it reads. + +GENERATE_TAGFILE = + +# If the ALLEXTERNALS tag is set to YES all external classes will be listed +# in the class index. If set to NO only the inherited external classes +# will be listed. + +ALLEXTERNALS = NO + +# If the EXTERNAL_GROUPS tag is set to YES all external groups will be listed +# in the modules index. If set to NO, only the current project's groups will +# be listed. + +EXTERNAL_GROUPS = YES + +# The PERL_PATH should be the absolute path and name of the perl script +# interpreter (i.e. the result of `which perl'). + +PERL_PATH = /usr/bin/perl + +#--------------------------------------------------------------------------- +# Configuration options related to the dot tool +#--------------------------------------------------------------------------- + +# If the CLASS_DIAGRAMS tag is set to YES (the default) Doxygen will +# generate a inheritance diagram (in HTML, RTF and LaTeX) for classes with base or +# super classes. Setting the tag to NO turns the diagrams off. Note that this +# option is superseded by the HAVE_DOT option below. This is only a fallback. It is +# recommended to install and use dot, since it yields more powerful graphs. + +CLASS_DIAGRAMS = YES + +# If set to YES, the inheritance and collaboration graphs will hide +# inheritance and usage relations if the target is undocumented +# or is not a class. + +HIDE_UNDOC_RELATIONS = YES + +# If you set the HAVE_DOT tag to YES then doxygen will assume the dot tool is +# available from the path. This tool is part of Graphviz, a graph visualization +# toolkit from AT&T and Lucent Bell Labs. The other options in this section +# have no effect if this option is set to NO (the default) + +HAVE_DOT = YES + +# If the CLASS_GRAPH and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for each documented class showing the direct and +# indirect inheritance relations. Setting this tag to YES will force the +# the CLASS_DIAGRAMS tag to NO. + +CLASS_GRAPH = YES + +# If the COLLABORATION_GRAPH and HAVE_DOT tags are set to YES then doxygen +# will generate a graph for each documented class showing the direct and +# indirect implementation dependencies (inheritance, containment, and +# class references variables) of the class with other documented classes. + +COLLABORATION_GRAPH = YES + +# If the UML_LOOK tag is set to YES doxygen will generate inheritance and +# collaboration diagrams in a style similar to the OMG's Unified Modeling +# Language. + +UML_LOOK = NO + +# If set to YES, the inheritance and collaboration graphs will show the +# relations between templates and their instances. + +TEMPLATE_RELATIONS = NO + +# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDE_GRAPH, and HAVE_DOT +# tags are set to YES then doxygen will generate a graph for each documented +# file showing the direct and indirect include dependencies of the file with +# other documented files. + +INCLUDE_GRAPH = YES + +# If the ENABLE_PREPROCESSING, SEARCH_INCLUDES, INCLUDED_BY_GRAPH, and +# HAVE_DOT tags are set to YES then doxygen will generate a graph for each +# documented header file showing the documented files that directly or +# indirectly include this file. + +INCLUDED_BY_GRAPH = YES + +# If the CALL_GRAPH and HAVE_DOT tags are set to YES then doxygen will +# generate a call dependency graph for every global function or class method. +# Note that enabling this option will significantly increase the time of a run. +# So in most cases it will be better to enable call graphs for selected +# functions only using the \callgraph command. + +CALL_GRAPH = NO + +# If the GRAPHICAL_HIERARCHY and HAVE_DOT tags are set to YES then doxygen +# will graphical hierarchy of all classes instead of a textual one. + +GRAPHICAL_HIERARCHY = YES + +# The DOT_IMAGE_FORMAT tag can be used to set the image format of the images +# generated by dot. Possible values are png, jpg, or gif +# If left blank png will be used. + +DOT_IMAGE_FORMAT = png + +# The tag DOT_PATH can be used to specify the path where the dot tool can be +# found. If left blank, it is assumed the dot tool can be found on the path. + +DOT_PATH = + +# The DOTFILE_DIRS tag can be used to specify one or more directories that +# contain dot files that are included in the documentation (see the +# \dotfile command). + +DOTFILE_DIRS = + +# The MAX_DOT_GRAPH_WIDTH tag can be used to set the maximum allowed width +# (in pixels) of the graphs generated by dot. If a graph becomes larger than +# this value, doxygen will try to truncate the graph, so that it fits within +# the specified constraint. Beware that most browsers cannot cope with very +# large images. + +MAX_DOT_GRAPH_WIDTH = 1024 + +# The MAX_DOT_GRAPH_HEIGHT tag can be used to set the maximum allows height +# (in pixels) of the graphs generated by dot. If a graph becomes larger than +# this value, doxygen will try to truncate the graph, so that it fits within +# the specified constraint. Beware that most browsers cannot cope with very +# large images. + +MAX_DOT_GRAPH_HEIGHT = 1024 + +# The MAX_DOT_GRAPH_DEPTH tag can be used to set the maximum depth of the +# graphs generated by dot. A depth value of 3 means that only nodes reachable +# from the root by following a path via at most 3 edges will be shown. Nodes that +# lay further from the root node will be omitted. Note that setting this option to +# 1 or 2 may greatly reduce the computation time needed for large code bases. Also +# note that a graph may be further truncated if the graph's image dimensions are +# not sufficient to fit the graph (see MAX_DOT_GRAPH_WIDTH and MAX_DOT_GRAPH_HEIGHT). +# If 0 is used for the depth value (the default), the graph is not depth-constrained. + +MAX_DOT_GRAPH_DEPTH = 0 + +# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will +# generate a legend page explaining the meaning of the various boxes and +# arrows in the dot generated graphs. + +GENERATE_LEGEND = YES + +# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will +# remove the intermediate dot files that are used to generate +# the various graphs. + +DOT_CLEANUP = YES + +#--------------------------------------------------------------------------- +# Configuration::additions related to the search engine +#--------------------------------------------------------------------------- + +# The SEARCHENGINE tag specifies whether or not a search engine should be +# used. If set to NO the values of all tags below this one will be ignored. + +SEARCHENGINE = YES diff --git a/doc/Makefile b/doc/Makefile index 7f35afd..9baddac 100644 --- a/doc/Makefile +++ b/doc/Makefile @@ -2,7 +2,7 @@ GEDA_PATH=/usr/share/gEDA/scheme FILES=aicpic.sch aicpower.sch -all: pdf drc bom partslist net +all: pdf drc bom partslist net html drc: aic.drc @@ -81,6 +81,12 @@ aic.pdf: aic.ps #aic_pin_silk.ps: aic_frontsilk.ps aic_front.ps # MergePCBPS aic_frontsilk.ps aic_front.ps > aic_pin_silk.ps +html: html/index.html + +html/index.html: Doxyfile + doxygen + + clean: rm -rf *.log *~ tmp.ps aicpic.ps aicpower.ps *.bak* aic_pin_silk.ps *.eps aic.pcb- *.old @@ -88,4 +94,4 @@ mrproper: clean rm -rf *.drc *.bom *.bpp *.xrf *.csv *.pl1 *.pl2 *.pl3 *.net aic.pdf *.tgz distclean: mrproper - rm -rf aicpic.ps aicpower.ps + rm -rf aicpic.ps aicpower.ps html diff --git a/doc/aicpic.pdf b/doc/aicpic.pdf index 550d6c1..d04b497 100644 Binary files a/doc/aicpic.pdf and b/doc/aicpic.pdf differ diff --git a/doc/aicpic.sch b/doc/aicpic.sch index 549c68c..9204294 100644 --- a/doc/aicpic.sch +++ b/doc/aicpic.sch @@ -22,7 +22,7 @@ T 2300 78100 5 10 1 1 0 0 1 value=47uFx16V T 3000 78800 5 10 0 0 0 0 1 footprint=RCY100P -T 3000 78800 5 10 1 1 0 0 1 +T 3000 78800 5 10 0 1 0 0 1 symversion=0.100 } C 5000 77900 1 90 0 capacitor-1.sym @@ -33,7 +33,7 @@ T 4900 78100 5 10 1 1 0 0 1 value=100nF T 5000 77900 5 10 0 0 0 0 1 footprint=RCI200 -T 5000 77900 5 10 1 1 0 0 1 +T 5000 77900 5 10 0 1 0 0 1 symversion=0.100 } C 10200 79000 1 180 0 resistor-1.sym @@ -68,7 +68,7 @@ T 6600 78100 5 10 1 1 0 0 1 value=47uFx16V T 7300 78800 5 10 0 0 0 0 1 footprint=RCY100P -T 7300 78800 5 10 1 1 0 0 1 +T 7300 78800 5 10 0 1 0 0 1 symversion=0.100 } C 8700 77900 1 90 0 capacitor-1.sym @@ -79,7 +79,7 @@ T 8600 78100 5 10 1 1 0 0 1 value=100nF T 8700 77900 5 10 0 0 0 0 1 footprint=RCI200 -T 8700 77900 5 10 1 1 0 0 1 +T 8700 77900 5 10 0 1 0 0 1 symversion=0.100 } C 8400 77000 1 0 0 gnd-1.sym @@ -443,7 +443,7 @@ T 4400 77400 5 10 1 1 180 0 1 value=2.2nF T 4500 77900 5 10 0 0 0 0 1 footprint=RCI200 -T 4500 77900 5 10 1 1 0 0 1 +T 4500 77900 5 10 0 1 0 0 1 symversion=0.100 } N 3600 77700 3200 77700 4 @@ -483,7 +483,7 @@ T 4300 74900 5 10 1 1 0 0 1 value=100nF T 4400 74700 5 10 0 0 0 0 1 footprint=RCI200 -T 4400 74700 5 10 1 1 0 0 1 +T 4400 74700 5 10 0 1 0 0 1 symversion=0.100 } C 5500 74700 1 90 0 capacitor-1.sym @@ -494,7 +494,7 @@ T 5400 74900 5 10 1 1 0 0 1 value=100nF T 5500 74700 5 10 0 0 0 0 1 footprint=RCI200 -T 5500 74700 5 10 1 1 0 0 1 +T 5500 74700 5 10 0 1 0 0 1 symversion=0.100 } C 4000 75600 1 0 0 5V-plus-1.sym @@ -518,7 +518,7 @@ T 9100 84400 5 10 0 0 0 0 1 footprint=RCY100P T 8200 83800 5 10 1 1 0 0 1 value=1uFx16V -T 9100 84400 5 10 1 1 0 0 1 +T 9100 84400 5 10 0 1 0 0 1 symversion=0.100 } C 5300 84000 1 0 0 capacitor-4.sym @@ -529,7 +529,7 @@ T 5300 84000 5 10 0 0 0 0 1 footprint=RCY100P T 4700 84200 5 10 1 1 0 0 1 value=1uFx16V -T 5300 84000 5 10 1 1 0 0 1 +T 5300 84000 5 10 0 1 0 0 1 symversion=0.100 } C 5300 83200 1 0 0 capacitor-4.sym @@ -540,7 +540,7 @@ T 5300 83200 5 10 0 0 0 0 1 footprint=RCY100P T 4700 83400 5 10 1 1 0 0 1 value=1uFx16V -T 5300 83200 5 10 1 1 0 0 1 +T 5300 83200 5 10 0 1 0 0 1 symversion=0.100 } C 8200 83200 1 0 0 capacitor-4.sym @@ -551,7 +551,7 @@ T 8200 83200 5 10 0 0 0 0 1 footprint=RCY100P T 8200 83000 5 10 1 1 0 0 1 value=1uFx16V -T 8200 83200 5 10 1 1 0 0 1 +T 8200 83200 5 10 0 1 0 0 1 symversion=0.100 } C 7300 79400 1 0 0 vcc-1.sym @@ -589,7 +589,7 @@ T 7500 74900 5 10 1 1 0 0 1 value=100nF T 7600 74700 5 10 0 0 0 0 1 footprint=RCI200 -T 7600 74700 5 10 1 1 0 0 1 +T 7600 74700 5 10 0 1 0 0 1 symversion=0.100 } C 8600 74700 1 90 0 capacitor-1.sym @@ -600,7 +600,7 @@ T 8500 74900 5 10 1 1 0 0 1 value=100nF T 8600 74700 5 10 0 0 0 0 1 footprint=RCI200 -T 8600 74700 5 10 1 1 0 0 1 +T 8600 74700 5 10 0 1 0 0 1 symversion=0.100 } C 8100 75600 1 0 1 generic-power.sym @@ -629,7 +629,7 @@ T 2300 74900 5 10 1 1 0 0 1 value=1uFx16V T 3000 75600 5 10 0 1 0 0 1 footprint=RCY100P -T 3000 75600 5 10 1 1 0 0 1 +T 3000 75600 5 10 0 1 0 0 1 symversion=0.100 } C 7600 87200 1 180 0 capacitor-4.sym @@ -640,7 +640,7 @@ T 6800 86600 5 10 1 1 0 0 1 value=1uFx16V T 7600 87200 5 10 0 1 270 0 1 footprint=RCY100P -T 7600 87200 5 10 1 1 0 0 1 +T 7600 87200 5 10 0 1 0 0 1 symversion=0.100 } N 18900 84000 22100 84000 4 @@ -665,7 +665,7 @@ T 19300 86100 5 10 1 1 180 0 1 refdes=C26 T 18900 85600 5 10 1 1 0 0 1 value=2.2nF -T 19600 85400 5 10 1 1 0 0 1 +T 19600 85400 5 10 0 1 0 0 1 symversion=0.100 } C 20400 85400 1 90 0 capacitor-1.sym @@ -674,7 +674,7 @@ T 20100 86100 5 10 1 1 180 0 1 refdes=C27 T 19700 85600 5 10 1 1 0 0 1 value=2.2nF -T 20400 85400 5 10 1 1 0 0 1 +T 20400 85400 5 10 0 1 0 0 1 symversion=0.100 } N 19400 86900 19400 86300 4 diff --git a/doc/aicpower.pdf b/doc/aicpower.pdf index 4775dba..4569563 100644 Binary files a/doc/aicpower.pdf and b/doc/aicpower.pdf differ diff --git a/doc/aicpower.sch b/doc/aicpower.sch index 2d211f5..cb8db0c 100644 --- a/doc/aicpower.sch +++ b/doc/aicpower.sch @@ -336,7 +336,7 @@ Actuador Interface Card - Power Drive & Edge Connector T 17300 73900 9 10 1 0 0 0 1 aicpower.sch T 21200 73900 9 10 1 0 0 0 1 -2.1.0 +2.2.0 T 22200 73700 9 6 1 0 0 0 2 Walter Fetter Lages Diego Caberlon Santini @@ -385,7 +385,7 @@ T 11100 80100 5 10 0 1 0 0 1 footprint=RCY100P T 11400 79400 5 10 1 1 0 0 1 value=4.7uFx16V -T 11100 80100 5 10 1 1 0 0 1 +T 11100 80100 5 10 0 1 0 0 1 symversion=0.100 } N 9600 80100 11300 80100 4 @@ -402,7 +402,7 @@ T 10400 79400 5 10 1 1 0 0 1 value=100nF T 10400 79200 5 10 0 0 0 0 1 footprint=RCI200 -T 10400 79200 5 10 1 1 0 0 1 +T 10400 79200 5 10 0 1 0 0 1 symversion=0.100 } C 14300 78400 1 0 0 output-2.sym @@ -442,7 +442,7 @@ T 8400 87200 5 10 0 1 0 0 1 footprint=RCY300P T 8400 86400 5 10 1 1 0 0 1 value=1000uFx100V -T 8400 87200 5 10 1 1 0 0 1 +T 8400 87200 5 10 0 1 0 0 1 symversion=0.100 } N 8200 87200 8600 87200 4 @@ -454,7 +454,7 @@ T 2000 87300 5 10 0 1 0 0 1 footprint=RCY100P T 1300 86600 5 10 1 1 0 0 1 value=10uFx16V -T 2100 87300 5 10 1 1 0 0 1 +T 2100 87300 5 10 0 1 0 0 1 symversion=0.100 } C 2200 86100 1 0 0 gnd-1.sym @@ -467,7 +467,7 @@ T 2900 86600 5 10 1 1 0 0 1 value=100nF T 2900 86400 5 10 0 0 0 0 1 footprint=RCI200 -T 3000 86400 5 10 1 1 0 0 1 +T 3000 86400 5 10 0 1 0 0 1 symversion=0.100 } C 7700 85200 1 0 0 IRLZ24N-1.sym @@ -593,7 +593,7 @@ T 16600 87300 5 10 0 1 0 0 1 footprint=RCY100P T 16200 86400 5 10 1 1 0 0 1 value=10uFx16V -T 16600 87300 5 10 1 1 0 0 1 +T 16600 87300 5 10 0 1 0 0 1 symversion=0.100 } C 16900 86100 1 0 1 gnd-1.sym @@ -606,7 +606,7 @@ T 15900 86600 5 10 1 1 0 0 1 value=100nF T 16300 86400 5 10 0 0 0 0 1 footprint=RCI200 -T 16300 86400 5 10 1 1 0 0 1 +T 16300 86400 5 10 0 1 0 0 1 symversion=0.100 } N 11000 86000 11000 87200 4 @@ -689,7 +689,7 @@ T 6500 86000 5 10 0 1 0 6 1 footprint=RCY100P T 6700 85200 5 10 1 1 0 6 1 value=1uFx16V -T 6500 86000 5 10 1 1 0 0 1 +T 6500 86000 5 10 0 1 0 0 1 symversion=0.100 } C 5100 87100 1 0 0 diode-1.sym @@ -715,7 +715,7 @@ T 12700 86000 5 10 0 1 0 0 1 footprint=RCY100P T 12600 85200 5 10 1 1 0 0 1 value=1uFx16V -T 12700 86000 5 10 1 1 0 0 1 +T 12700 86000 5 10 0 1 0 0 1 symversion=0.100 } N 13200 84200 12400 84200 4 diff --git a/doc/tools.txt b/doc/tools.txt new file mode 100644 index 0000000..f54d7bd --- /dev/null +++ b/doc/tools.txt @@ -0,0 +1,10 @@ +cross-pic30-elf-binutils-2.14.mplab.3.01-1mdk.i586.tgz + +cross-pic30-elf-gcc-4.0.mplab.3.01-1mdk.i586.tgz + +MPLABC30v2_00Full.exe +mplabc30v2_00_serial.txt + +FreeRTOSV4.7.2.zip + + \ No newline at end of file diff --git a/gld/p30f4012.gld b/gld/p30f4012.gld deleted file mode 100644 index 8f41803..0000000 --- a/gld/p30f4012.gld +++ /dev/null @@ -1,1937 +0,0 @@ -/* -** Linker Script for 30f4012 -*/ - -OUTPUT_ARCH("30f4012") -EXTERN(__resetPRI) -EXTERN(__resetALT) - - -/* -** Memory Regions -*/ -MEMORY -{ - data (a!xr) : ORIGIN = 0x800, LENGTH = 2048 - program (xr) : ORIGIN = 0x100, LENGTH = ((16K * 2) - 0x100) - reset : ORIGIN = 0, LENGTH = (4) - ivt : ORIGIN = 0x04, LENGTH = (62 * 2) - aivt : ORIGIN = 0x84, LENGTH = (62 * 2) - __FOSC : ORIGIN = 0xF80000, LENGTH = (2) - __FWDT : ORIGIN = 0xF80002, LENGTH = (2) - __FBORPOR : ORIGIN = 0xF80004, LENGTH = (2) - __CONFIG4 : ORIGIN = 0xF80006, LENGTH = (2) - __CONFIG5 : ORIGIN = 0xF80008, LENGTH = (2) - __FGS : ORIGIN = 0xF8000A, LENGTH = (2) - eedata : ORIGIN = 0x7FFC00, LENGTH = (1024) -} -__NO_HANDLES = 1; /* Suppress handles on this device */ - - -/* -** Base Memory Addresses - Program Memory -*/ -__RESET_BASE = 0; /* Reset Instruction */ -__IVT_BASE = 0x04; /* Interrupt Vector Table */ -__AIVT_BASE = 0x84; /* Alternate Interrupt Vector Table */ -__CODE_BASE = 0x100; /* Handles, User Code, Library Code */ - - -/* -** Base Memory Addresses - Data Memory -*/ -__SFR_BASE = 0; /* Memory-mapped SFRs */ -__DATA_BASE = 0x800; /* X and General Purpose Data Memory */ -__YDATA_BASE = 0x0C00; /* Y Data Memory for DSP Instructions */ - - -/* -** ==================== Section Map ====================== -*/ - -SECTIONS -{ - - /* - ** ================== Program Memory ===================== - */ - - /* - ** Reset Instruction - */ - .reset __RESET_BASE : - { - SHORT(ABSOLUTE(__reset)); - SHORT(0x04); - SHORT((ABSOLUTE(__reset) >> 16) & 0x7F); - SHORT(0); - } >reset - - - /* - ** Interrupt Vector Tables - ** - ** The primary and alternate tables are loaded - ** here, between sections .reset and .text. - ** Vector table source code appears below. - */ - - /* - ** User Code and Library Code - */ - .text __CODE_BASE : - { - *(.handle); - *(.libc) *(.libm) *(.libdsp); /* keep together in this order */ - *(.lib*); - *(.text); - } >program - - /* - ** User-Defined Section in Program Memory - ** - ** note: can specify an address using - ** the following syntax: - ** - ** usercode 0x1234 : - ** { - ** *(usercode); - ** } >program - */ - usercode : - { - *(usercode); - } >program - - - /* - ** ================ Configuration Memory ================ - */ - - - /* - ** Configuration Fuses - */ - __FOSC : - { *(__FOSC.sec) } >__FOSC - __FWDT : - { *(__FWDT.sec) } >__FWDT - __FBORPOR : - { *(__FBORPOR.sec) } >__FBORPOR - __CONFIG4 : - { *(__CONFIG4.sec) } >__CONFIG4 - __CONFIG5 : - { *(__CONFIG5.sec) } >__CONFIG5 - __FGS : - { *(__FGS.sec) } >__FGS - - - /* - ** User-Defined Section in Data Flash Memory - ** - ** note: can specify an address using - ** the following syntax: - ** - ** user_eedata 0x7FFC00 : - ** { - ** *(user_eedata); - ** } >eedata - */ - user_eedata : - { - *(user_eedata); - } >eedata - - - /* - ** ==================== Data Memory =================== - */ - - /* - ** ICD Debug Exec - ** - ** This section provides optional storage for - ** the ICD2 debugger. Define a global symbol - ** named __ICD2RAM to enable ICD2. This section - ** must be loaded at data address 0x800. - */ - .icd __DATA_BASE (NOLOAD): - { - . += (DEFINED (__ICD2RAM) ? 0x50 : 0 ); - } > data - - - /* - ** User-Defined Section in Data Memory - ** - ** note: can specify an address using - ** the following syntax: - ** - ** userdata 0x1234 : - ** { - ** *(userdata); - ** } >data - */ - userdata : - { - *(userdata); - } >data - - - /* - ** ===================== Debug Info ==================== - */ - - .comment 0 : { *(.comment) } - - /* - ** DWARF-2 - */ - .debug_info 0 : { *(.debug_info) *(.gnu.linkonce.wi.*) } - .debug_abbrev 0 : { *(.debug_abbrev) } - .debug_line 0 : { *(.debug_line) } - .debug_frame 0 : { *(.debug_frame) } - .debug_str 0 : { *(.debug_str) } - .debug_loc 0 : { *(.debug_loc) } - .debug_macinfo 0 : { *(.debug_macinfo) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_ranges 0 : { *(.debug_ranges) } - .debug_aranges 0 : { *(.debug_aranges) } - -} /* SECTIONS */ - -/* -** ================= End of Section Map ================ -*/ -/* -** Section Map for Interrupt Vector Tables -*/ -SECTIONS -{ - -/* -** Primary Interrupt Vector Table -*/ -.ivt __IVT_BASE : - { - LONG(DEFINED(__ReservedTrap0 -) ? ABSOLUTE(__ReservedTrap0 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OscillatorFail -)? ABSOLUTE(__OscillatorFail -): - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__AddressError -) ? ABSOLUTE(__AddressError -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__StackError -) ? ABSOLUTE(__StackError -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__MathError -) ? ABSOLUTE(__MathError -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__ReservedTrap5 -) ? ABSOLUTE(__ReservedTrap5 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__ReservedTrap6 -) ? ABSOLUTE(__ReservedTrap6 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__ReservedTrap7 -) ? ABSOLUTE(__ReservedTrap7 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__INT0Interrupt -) ? ABSOLUTE(__INT0Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__IC1Interrupt -) ? ABSOLUTE(__IC1Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OC1Interrupt -) ? ABSOLUTE(__OC1Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__T1Interrupt -) ? ABSOLUTE(__T1Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__IC2Interrupt -) ? ABSOLUTE(__IC2Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OC2Interrupt -) ? ABSOLUTE(__OC2Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__T2Interrupt -) ? ABSOLUTE(__T2Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__T3Interrupt -) ? ABSOLUTE(__T3Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__SPI1Interrupt -) ? ABSOLUTE(__SPI1Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__U1RXInterrupt -) ? ABSOLUTE(__U1RXInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__U1TXInterrupt -) ? ABSOLUTE(__U1TXInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__ADCInterrupt -) ? ABSOLUTE(__ADCInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__NVMInterrupt -) ? ABSOLUTE(__NVMInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__SI2CInterrupt -) ? ABSOLUTE(__SI2CInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__MI2CInterrupt -) ? ABSOLUTE(__MI2CInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__CNInterrupt -) ? ABSOLUTE(__CNInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__INT1Interrupt -) ? ABSOLUTE(__INT1Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__IC7Interrupt -) ? ABSOLUTE(__IC7Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__IC8Interrupt -) ? ABSOLUTE(__IC8Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OC3Interrupt -) ? ABSOLUTE(__OC3Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OC4Interrupt -) ? ABSOLUTE(__OC4Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__T4Interrupt -) ? ABSOLUTE(__T4Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__T5Interrupt -) ? ABSOLUTE(__T5Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__INT2Interrupt -) ? ABSOLUTE(__INT2Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__U2RXInterrupt -) ? ABSOLUTE(__U2RXInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__U2TXInterrupt -) ? ABSOLUTE(__U2TXInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__SPI2Interrupt -) ? ABSOLUTE(__SPI2Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__C1Interrupt -) ? ABSOLUTE(__C1Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__IC3Interrupt -) ? ABSOLUTE(__IC3Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__IC4Interrupt -) ? ABSOLUTE(__IC4Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__IC5Interrupt -) ? ABSOLUTE(__IC5Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__IC6Interrupt -) ? ABSOLUTE(__IC6Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OC5Interrupt -) ? ABSOLUTE(__OC5Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OC6Interrupt -) ? ABSOLUTE(__OC6Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OC7Interrupt -) ? ABSOLUTE(__OC7Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__OC8Interrupt -) ? ABSOLUTE(__OC8Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__INT3Interrupt -) ? ABSOLUTE(__INT3Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__INT4Interrupt -) ? ABSOLUTE(__INT4Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__C2Interrupt -) ? ABSOLUTE(__C2Interrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__PWMInterrupt -) ? ABSOLUTE(__PWMInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__QEIInterrupt -) ? ABSOLUTE(__QEIInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__DCIInterrupt -) ? ABSOLUTE(__DCIInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__LVDInterrupt -) ? ABSOLUTE(__LVDInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__FLTAInterrupt -) ? ABSOLUTE(__FLTAInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__FLTBInterrupt -) ? ABSOLUTE(__FLTBInterrupt -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt45 -) ? ABSOLUTE(__Interrupt45 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt46 -) ? ABSOLUTE(__Interrupt46 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt47 -) ? ABSOLUTE(__Interrupt47 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt48 -) ? ABSOLUTE(__Interrupt48 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt49 -) ? ABSOLUTE(__Interrupt49 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt50 -) ? ABSOLUTE(__Interrupt50 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt51 -) ? ABSOLUTE(__Interrupt51 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt52 -) ? ABSOLUTE(__Interrupt52 -) : - ABSOLUTE(__DefaultInterrupt)); - LONG(DEFINED(__Interrupt53 -) ? ABSOLUTE(__Interrupt53 -) : - ABSOLUTE(__DefaultInterrupt)); - } >ivt - - -/* -** Alternate Interrupt Vector Table -*/ -.aivt __AIVT_BASE : - { - LONG(DEFINED(__AltReservedTrap0 -) ? ABSOLUTE(__AltReservedTrap0 -) : - (DEFINED(__ReservedTrap0 -) ? ABSOLUTE(__ReservedTrap0 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOscillatorFail -)? ABSOLUTE(__AltOscillatorFail -): - (DEFINED(__OscillatorFail -) ? ABSOLUTE(__OscillatorFail -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltAddressError -) ? ABSOLUTE(__AltAddressError -) : - (DEFINED(__AddressError -) ? ABSOLUTE(__AddressError -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltStackError -) ? ABSOLUTE(__AltStackError -) : - (DEFINED(__StackError -) ? ABSOLUTE(__StackError -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltMathError -) ? ABSOLUTE(__AltMathError -) : - (DEFINED(__MathError -) ? ABSOLUTE(__MathError -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltReservedTrap5 -) ? ABSOLUTE(__AltReservedTrap5 -) : - (DEFINED(__ReservedTrap5 -) ? ABSOLUTE(__ReservedTrap5 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltReservedTrap6 -) ? ABSOLUTE(__AltReservedTrap6 -) : - (DEFINED(__ReservedTrap6 -) ? ABSOLUTE(__ReservedTrap6 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltReservedTrap7 -) ? ABSOLUTE(__AltReservedTrap7 -) : - (DEFINED(__ReservedTrap7 -) ? ABSOLUTE(__ReservedTrap7 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltINT0Interrupt -) ? ABSOLUTE(__AltINT0Interrupt -) : - (DEFINED(__INT0Interrupt -) ? ABSOLUTE(__INT0Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltIC1Interrupt -) ? ABSOLUTE(__AltIC1Interrupt -) : - (DEFINED(__IC1Interrupt -) ? ABSOLUTE(__IC1Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOC1Interrupt -) ? ABSOLUTE(__AltOC1Interrupt -) : - (DEFINED(__OC1Interrupt -) ? ABSOLUTE(__OC1Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltT1Interrupt -) ? ABSOLUTE(__AltT1Interrupt -) : - (DEFINED(__T1Interrupt -) ? ABSOLUTE(__T1Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltIC2Interrupt -) ? ABSOLUTE(__AltIC2Interrupt -) : - (DEFINED(__IC2Interrupt -) ? ABSOLUTE(__IC2Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOC2Interrupt -) ? ABSOLUTE(__AltOC2Interrupt -) : - (DEFINED(__OC2Interrupt -) ? ABSOLUTE(__OC2Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltT2Interrupt -) ? ABSOLUTE(__AltT2Interrupt -) : - (DEFINED(__T2Interrupt -) ? ABSOLUTE(__T2Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltT3Interrupt -) ? ABSOLUTE(__AltT3Interrupt -) : - (DEFINED(__T3Interrupt -) ? ABSOLUTE(__T3Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltSPI1Interrupt -) ? ABSOLUTE(__AltSPI1Interrupt -) : - (DEFINED(__SPI1Interrupt -) ? ABSOLUTE(__SPI1Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltU1RXInterrupt -) ? ABSOLUTE(__AltU1RXInterrupt -) : - (DEFINED(__U1RXInterrupt -) ? ABSOLUTE(__U1RXInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltU1TXInterrupt -) ? ABSOLUTE(__AltU1TXInterrupt -) : - (DEFINED(__U1TXInterrupt -) ? ABSOLUTE(__U1TXInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltADCInterrupt -) ? ABSOLUTE(__AltADCInterrupt -) : - (DEFINED(__ADCInterrupt -) ? ABSOLUTE(__ADCInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltNVMInterrupt -) ? ABSOLUTE(__AltNVMInterrupt -) : - (DEFINED(__NVMInterrupt -) ? ABSOLUTE(__NVMInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltSI2CInterrupt -) ? ABSOLUTE(__AltSI2CInterrupt -) : - (DEFINED(__SI2CInterrupt -) ? ABSOLUTE(__SI2CInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltMI2CInterrupt -) ? ABSOLUTE(__AltMI2CInterrupt -) : - (DEFINED(__MI2CInterrupt -) ? ABSOLUTE(__MI2CInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltCNInterrupt -) ? ABSOLUTE(__AltCNInterrupt -) : - (DEFINED(__CNInterrupt -) ? ABSOLUTE(__CNInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltINT1Interrupt -) ? ABSOLUTE(__AltINT1Interrupt -) : - (DEFINED(__INT1Interrupt -) ? ABSOLUTE(__INT1Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltIC7Interrupt -) ? ABSOLUTE(__AltIC7Interrupt -) : - (DEFINED(__IC7Interrupt -) ? ABSOLUTE(__IC7Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltIC8Interrupt -) ? ABSOLUTE(__AltIC8Interrupt -) : - (DEFINED(__IC8Interrupt -) ? ABSOLUTE(__IC8Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOC3Interrupt -) ? ABSOLUTE(__AltOC3Interrupt -) : - (DEFINED(__OC3Interrupt -) ? ABSOLUTE(__OC3Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOC4Interrupt -) ? ABSOLUTE(__AltOC4Interrupt -) : - (DEFINED(__OC4Interrupt -) ? ABSOLUTE(__OC4Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltT4Interrupt -) ? ABSOLUTE(__AltT4Interrupt -) : - (DEFINED(__T4Interrupt -) ? ABSOLUTE(__T4Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltT5Interrupt -) ? ABSOLUTE(__AltT5Interrupt -) : - (DEFINED(__T5Interrupt -) ? ABSOLUTE(__T5Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltINT2Interrupt -) ? ABSOLUTE(__AltINT2Interrupt -) : - (DEFINED(__INT2Interrupt -) ? ABSOLUTE(__INT2Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltU2RXInterrupt -) ? ABSOLUTE(__AltU2RXInterrupt -) : - (DEFINED(__U2RXInterrupt -) ? ABSOLUTE(__U2RXInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltU2TXInterrupt -) ? ABSOLUTE(__AltU2TXInterrupt -) : - (DEFINED(__U2TXInterrupt -) ? ABSOLUTE(__U2TXInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltSPI2Interrupt -) ? ABSOLUTE(__AltSPI2Interrupt -) : - (DEFINED(__SPI2Interrupt -) ? ABSOLUTE(__SPI2Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltC1Interrupt -) ? ABSOLUTE(__AltC1Interrupt -) : - (DEFINED(__C1Interrupt -) ? ABSOLUTE(__C1Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltIC3Interrupt -) ? ABSOLUTE(__AltIC3Interrupt -) : - (DEFINED(__IC3Interrupt -) ? ABSOLUTE(__IC3Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltIC4Interrupt -) ? ABSOLUTE(__AltIC4Interrupt -) : - (DEFINED(__IC4Interrupt -) ? ABSOLUTE(__IC4Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltIC5Interrupt -) ? ABSOLUTE(__AltIC5Interrupt -) : - (DEFINED(__IC5Interrupt -) ? ABSOLUTE(__IC5Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltIC6Interrupt -) ? ABSOLUTE(__AltIC6Interrupt -) : - (DEFINED(__IC6Interrupt -) ? ABSOLUTE(__IC6Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOC5Interrupt -) ? ABSOLUTE(__AltOC5Interrupt -) : - (DEFINED(__OC5Interrupt -) ? ABSOLUTE(__OC5Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOC6Interrupt -) ? ABSOLUTE(__AltOC6Interrupt -) : - (DEFINED(__OC6Interrupt -) ? ABSOLUTE(__OC6Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOC7Interrupt -) ? ABSOLUTE(__AltOC7Interrupt -) : - (DEFINED(__OC7Interrupt -) ? ABSOLUTE(__OC7Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltOC8Interrupt -) ? ABSOLUTE(__AltOC8Interrupt -) : - (DEFINED(__OC8Interrupt -) ? ABSOLUTE(__OC8Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltINT3Interrupt -) ? ABSOLUTE(__AltINT3Interrupt -) : - (DEFINED(__INT3Interrupt -) ? ABSOLUTE(__INT3Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltINT4Interrupt -) ? ABSOLUTE(__AltINT4Interrupt -) : - (DEFINED(__INT4Interrupt -) ? ABSOLUTE(__INT4Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltC2Interrupt -) ? ABSOLUTE(__AltC2Interrupt -) : - (DEFINED(__C2Interrupt -) ? ABSOLUTE(__C2Interrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltPWMInterrupt -) ? ABSOLUTE(__AltPWMInterrupt -) : - (DEFINED(__PWMInterrupt -) ? ABSOLUTE(__PWMInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltQEIInterrupt -) ? ABSOLUTE(__AltQEIInterrupt -) : - (DEFINED(__QEIInterrupt -) ? ABSOLUTE(__QEIInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltDCIInterrupt -) ? ABSOLUTE(__AltDCIInterrupt -) : - (DEFINED(__DCIInterrupt -) ? ABSOLUTE(__DCIInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltLVDInterrupt -) ? ABSOLUTE(__AltLVDInterrupt -) : - (DEFINED(__LVDInterrupt -) ? ABSOLUTE(__LVDInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltFLTAInterrupt -) ? ABSOLUTE(__AltFLTAInterrupt -) : - (DEFINED(__FLTAInterrupt -) ? ABSOLUTE(__FLTAInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltFLTBInterrupt -) ? ABSOLUTE(__AltFLTBInterrupt -) : - (DEFINED(__FLTBInterrupt -) ? ABSOLUTE(__FLTBInterrupt -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt45 -) ? ABSOLUTE(__AltInterrupt45 -) : - (DEFINED(__Interrupt45 -) ? ABSOLUTE(__Interrupt45 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt46 -) ? ABSOLUTE(__AltInterrupt46 -) : - (DEFINED(__Interrupt46 -) ? ABSOLUTE(__Interrupt46 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt47 -) ? ABSOLUTE(__AltInterrupt47 -) : - (DEFINED(__Interrupt47 -) ? ABSOLUTE(__Interrupt47 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt48 -) ? ABSOLUTE(__AltInterrupt48 -) : - (DEFINED(__Interrupt48 -) ? ABSOLUTE(__Interrupt48 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt49 -) ? ABSOLUTE(__AltInterrupt49 -) : - (DEFINED(__Interrupt49 -) ? ABSOLUTE(__Interrupt49 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt50 -) ? ABSOLUTE(__AltInterrupt50 -) : - (DEFINED(__Interrupt50 -) ? ABSOLUTE(__Interrupt50 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt51 -) ? ABSOLUTE(__AltInterrupt51 -) : - (DEFINED(__Interrupt51 -) ? ABSOLUTE(__Interrupt51 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt52 -) ? ABSOLUTE(__AltInterrupt52 -) : - (DEFINED(__Interrupt52 -) ? ABSOLUTE(__Interrupt52 -) : - ABSOLUTE(__DefaultInterrupt))); - LONG(DEFINED(__AltInterrupt53 -) ? ABSOLUTE(__AltInterrupt53 -) : - (DEFINED(__Interrupt53 -) ? ABSOLUTE(__Interrupt53 -) : - ABSOLUTE(__DefaultInterrupt))); - } >aivt - -} /* SECTIONS */ - - -/* File Description | Notes: -** ========================= -** 1] This file maps special function register(SFR) names used in the datasheet -** to memory locations in the PIC30Fxxxx device. The memory locations are -** byte addresses. The PIC30Fxxxx is a family of byte addressable devices. -** 2] The register names used in this file are taken to match the -** PIC30Fxxxx data sheets as closely as possible. -** 3] SFR address definitions are listed in the ascending order of memory -** addresses and are grouped based on the module they belong to. For e.g., -** WREG10 is listed before ACCAL, and the Core SFRs are grouped -** separately, prior to the Interrupt Controller SFRs or the General -** Purpose Timer SFRs. -** 4] SFR names exactly match names in the device specific C "header" file -** and the Assembly "include" file. Any changes to names in one of these -** files, calls for similar changes in the other two. -** -* Revision History: -** ================= -**------------------------------------------------------------------------- -**Rev: Date: Details: Who: -**------------------------------------------------------------------------- -**1.0 11/29/01 Device linker provides from superset h vasuki -**1.1 13 Dec 2001 Added PMD registers + some changes -do- -**1.2 02 Dec 2002 CAN buffer correction -do- -**1.3 13 Feb 2003 ADCSSLBits/ADPCFGBits Address correction -do- -**1.4 05 May 2003 Initial release of linker scripts for rev -do- -** B silicon with changes in CAN section -**1.6 25 Nov 2003 CAN2 SFR bytes additions h vasuki -**1.7 30 Jul 2004 ADCBUF0-ADCBUFF Address Correction h vasuki -**1.7a 17 Dec 2004 CAN TXERRCNT Address Correction h vasuki -** -**------------------------------------------------------------------------- -** -** -***************************************/ - - -/*========================================================================= -** Register Definitions -** (Core and Peripheral Registers in Data Space) -**========================================================================== -** -**========================================================================== -** -** dsPIC Core Register Definitions -** -**=========================================================================*/ - WREG0 = 0x0000; -_WREG0 = 0x0000; - WREG1 = 0x0002; -_WREG1 = 0x0002; - WREG2 = 0x0004; -_WREG2 = 0x0004; - WREG3 = 0x0006; -_WREG3 = 0x0006; - WREG4 = 0x0008; -_WREG4 = 0x0008; - WREG5 = 0x000A; -_WREG5 = 0x000A; - WREG6 = 0x000C; -_WREG6 = 0x000C; - WREG7 = 0x000E; -_WREG7 = 0x000E; - WREG8 = 0x0010; -_WREG8 = 0x0010; - WREG9 = 0x0012; -_WREG9 = 0x0012; - WREG10 = 0x0014; -_WREG10 = 0x0014; - WREG11 = 0x0016; -_WREG11 = 0x0016; - WREG12 = 0x0018; -_WREG12 = 0x0018; - WREG13 = 0x001A; -_WREG13 = 0x001A; - WREG14 = 0x001C; -_WREG14 = 0x001C; - WREG15 = 0x001E; -_WREG15 = 0x001E; - SPLIM = 0x0020; -_SPLIM = 0x0020; - ACCAL = 0x0022; -_ACCAL = 0x0022; - ACCAH = 0x0024; -_ACCAH = 0x0024; - ACCAU = 0x0026; -_ACCAU = 0x0026; - ACCBL = 0x0028; -_ACCBL = 0x0028; - ACCBH = 0x002A; -_ACCBH = 0x002A; - ACCBU = 0x002C; -_ACCBU = 0x002C; - PCL = 0x002E; -_PCL = 0x002E; - PCH = 0x0030; -_PCH = 0x0030; - TBLPAG = 0x0032; -_TBLPAG = 0x0032; - PSVPAG = 0x0034; -_PSVPAG = 0x0034; - RCOUNT = 0x0036; -_RCOUNT = 0x0036; - DCOUNT = 0x0038; -_DCOUNT = 0x0038; - DOSTARTL = 0x003A; -_DOSTARTL = 0x003A; - DOSTARTH = 0x003C; -_DOSTARTH = 0x003C; - DOENDL = 0x003E; -_DOENDL = 0x003E; - DOENDH = 0x0040; -_DOENDH = 0x0040; - SR = 0x0042; -_SR = 0x0042; - CORCON = 0x0044; -_CORCON = 0x0044; - MODCON = 0x0046; -_MODCON = 0x0046; - XMODSRT = 0x0048; -_XMODSRT = 0x0048; - XMODEND = 0x004A; -_XMODEND = 0x004A; - YMODSRT = 0x004C; -_YMODSRT = 0x004C; - YMODEND = 0x004E; -_YMODEND = 0x004E; - XBREV = 0x0050; -_XBREV = 0x0050; - DISICNT = 0x0052; -_DISICNT = 0x0052; - - - -/*========================================================================== -** -** Interrupt Controller Register Definitions -** -==========================================================================*/ - INTCON1 = 0x0080; -_INTCON1 = 0x0080; - INTCON2 = 0x0082; -_INTCON2 = 0x0082; - IFS0 = 0x0084; -_IFS0 = 0x0084; - IFS1 = 0x0086; -_IFS1 = 0x0086; - IFS2 = 0x0088; -_IFS2 = 0x0088; - IEC0 = 0x008C; -_IEC0 = 0x008C; - IEC1 = 0x008E; -_IEC1 = 0x008E; - IEC2 = 0x0090; -_IEC2 = 0x0090; - IPC0 = 0x0094; -_IPC0 = 0x0094; - IPC1 = 0x0096; -_IPC1 = 0x0096; - IPC2 = 0x0098; -_IPC2 = 0x0098; - IPC3 = 0x009A; -_IPC3 = 0x009A; - IPC4 = 0x009C; -_IPC4 = 0x009C; - IPC5 = 0x009E; -_IPC5 = 0x009E; - IPC6 = 0x00A0; -_IPC6 = 0x00A0; - IPC9 = 0x00A6; -_IPC9 = 0x00A6; - IPC10 = 0x00A8; -_IPC10 = 0x00A8; - - - -/*========================================================================== -** -** Input Change Notification Module Register Definitions -** -===========================================================================*/ - CNEN1 = 0x00C0; -_CNEN1 = 0x00C0; - CNPU1 = 0x00C4; -_CNPU1 = 0x00C4; - - - -/*========================================================================= -** -** Peripheral Register Definitions -** -===========================================================================*/ -/*========================================================================= -** -** Timer Module Register Definitions -** -===========================================================================*/ -/*--------------Timer 1 Module---------------------------------------------*/ - TMR1 = 0x0100; -_TMR1 = 0x0100; - PR1 = 0x0102; -_PR1 = 0x0102; - T1CON = 0x0104; -_T1CON = 0x0104; - -/*--------------Timer2/3 Module--------------------------------------------*/ - TMR2 = 0x0106; -_TMR2 = 0x0106; - TMR3HLD = 0x0108; -_TMR3HLD = 0x0108; - TMR3 = 0x010A; -_TMR3 = 0x010A; - PR2 = 0x010C; -_PR2 = 0x010C; - PR3 = 0x010E; -_PR3 = 0x010E; - T2CON = 0x0110; -_T2CON = 0x0110; - T3CON = 0x0112; -_T3CON = 0x0112; - -/*------------- Timer4/5 Module---------------------------------------------*/ - TMR4 = 0x0114; -_TMR4 = 0x0114; - TMR5HLD = 0x0116; -_TMR5HLD = 0x0116; - TMR5 = 0x0118; -_TMR5 = 0x0118; - PR4 = 0x011A; -_PR4 = 0x011A; - PR5 = 0x011C; -_PR5 = 0x011C; - T4CON = 0x011E; -_T4CON = 0x011E; - T5CON = 0x0120; -_T5CON = 0x0120; - -/*========================================================================= -** -** Quadrature Encoder Interface Module Register Definitions -** -=========================================================================*/ - QEICON = 0x0122; -_QEICON = 0x0122; - DFLTCON = 0x0124; -_DFLTCON = 0x0124; - POSCNT = 0x0126; -_POSCNT = 0x0126; - MAXCNT = 0x0128; -_MAXCNT = 0x0128; - - -/*========================================================================= -** -** Input Capture Module Register Definitions -** -=========================================================================*/ - IC1BUF = 0x0140; -_IC1BUF = 0x0140; - IC1CON = 0x0142; -_IC1CON = 0x0142; - IC2BUF = 0x0144; -_IC2BUF = 0x0144; - IC2CON = 0x0146; -_IC2CON = 0x0146; - IC7BUF = 0x0158; -_IC7BUF = 0x0158; - IC7CON = 0x015A; -_IC7CON = 0x015A; - IC8BUF = 0x015C; -_IC8BUF = 0x015C; - IC8CON = 0x015E; -_IC8CON = 0x015E; - - - -/*========================================================================== -** -** Output Compare Module Register Definitions -** -===========================================================================*/ - OC1RS = 0x0180; -_OC1RS = 0x0180; - OC1R = 0x0182; -_OC1R = 0x0182; - OC1CON = 0x0184; -_OC1CON = 0x0184; - OC2RS = 0x0186; -_OC2RS = 0x0186; - OC2R = 0x0188; -_OC2R = 0x0188; - OC2CON = 0x018A; -_OC2CON = 0x018A; - - -/*========================================================================= -** -** Motor Control PWM Module Register Definitions -** -=========================================================================*/ - PTCON = 0x01C0; -_PTCON = 0x01C0; - PTMR = 0x01C2; -_PTMR = 0x01C2; - PTPER = 0x01C4; -_PTPER = 0x01C4; - SEVTCMP = 0x01C6; -_SEVTCMP = 0x01C6; - PWMCON1 = 0x01C8; -_PWMCON1 = 0x01C8; - PWMCON2 = 0x01CA; -_PWMCON2 = 0x01CA; - DTCON1 = 0x01CC; -_DTCON1 = 0x01CC; - FLTACON = 0x01D0; -_FLTACON = 0x01D0; - OVDCON = 0x01D4; -_OVDCON = 0x01D4; - PDC1 = 0x01D6; -_PDC1 = 0x01D6; - PDC2 = 0x01D8; -_PDC2 = 0x01D8; - PDC3 = 0x01DA; -_PDC3 = 0x01DA; - - - -/*========================================================================= -** -** Inter-Integrated Circuit(I2C) Module Register Definitions -** -==========================================================================*/ - I2CRCV = 0x0200; -_I2CRCV = 0x0200; - I2CTRN = 0x0202; -_I2CTRN = 0x0202; - I2CBRG = 0x0204; -_I2CBRG = 0x0204; - I2CCON = 0x0206; -_I2CCON = 0x0206; - I2CSTAT = 0x0208; -_I2CSTAT = 0x0208; - I2CADD = 0x020A; -_I2CADD = 0x020A; - -/*========================================================================== -** -** Universal Asynchronous Receiver TransmitterUART Module -** Register Definitions -** -==========================================================================*/ -/*------------------UART 1 Module-----------------------------------------*/ - U1MODE = 0x020C; -_U1MODE = 0x020C; - U1STA = 0x020E; -_U1STA = 0x020E; - U1TXREG = 0x0210; -_U1TXREG = 0x0210; - U1RXREG = 0x0212; -_U1RXREG = 0x0212; - U1BRG = 0x0214; -_U1BRG = 0x0214; - - -/*========================================================================== -** -** Serial Peripheral Interface(SPI) Module Register Definitions -** -==========================================================================*/ -/*-----------------SPI 1 Module-------------------------------------------*/ - SPI1STAT = 0x0220; -_SPI1STAT = 0x0220; - SPI1CON = 0x0222; -_SPI1CON = 0x0222; - SPI1BUF = 0x0224; -_SPI1BUF = 0x0224; - - - -/*========================================================================== -** -** 10-bit A/D Converter 500 Ksps Module Register Definitions -** -==========================================================================*/ - ADCBUF0 = 0x0280; -_ADCBUF0 = 0x0280; - ADCBUF1 = 0x0282; -_ADCBUF1 = 0x0282; - ADCBUF2 = 0x0284; -_ADCBUF2 = 0x0284; - ADCBUF3 = 0x0286; -_ADCBUF3 = 0x0286; - ADCBUF4 = 0x0288; -_ADCBUF4 = 0x0288; - ADCBUF5 = 0x028A; -_ADCBUF5 = 0x028A; - ADCBUF6 = 0x028C; -_ADCBUF6 = 0x028C; - ADCBUF7 = 0x028E; -_ADCBUF7 = 0x028E; - ADCBUF8 = 0x0290; -_ADCBUF8 = 0x0290; - ADCBUF9 = 0x0292; -_ADCBUF9 = 0x0292; - ADCBUFA = 0x0294; -_ADCBUFA = 0x0294; - ADCBUFB = 0x0296; -_ADCBUFB = 0x0296; - ADCBUFC = 0x0298; -_ADCBUFC = 0x0298; - ADCBUFD = 0x029A; -_ADCBUFD = 0x029A; - ADCBUFE = 0x029C; -_ADCBUFE = 0x029C; - ADCBUFF = 0x029E; -_ADCBUFF = 0x029E; - ADCON1 = 0x02A0; -_ADCON1 = 0x02A0; - ADCON2 = 0x02A2; -_ADCON2 = 0x02A2; - ADCON3 = 0x02A4; -_ADCON3 = 0x02A4; - ADCHS = 0x02A6; -_ADCHS = 0x02A6; - ADPCFG = 0x02A8; -_ADPCFG = 0x02A8; - ADCSSL = 0x02AA; -_ADCSSL = 0x02AA; - -/*========================================================================== -** -** General Purpose I/O Port Register Definitions -** -==========================================================================*/ - TRISB = 0x02C6; -_TRISB = 0x02C6; - PORTB = 0x02C8; -_PORTB = 0x02C8; - LATB = 0x02CA; -_LATB = 0x02CA; - - TRISC = 0x02CC; -_TRISC = 0x02CC; - PORTC = 0x02CE; -_PORTC = 0x02CE; - LATC = 0x02D0; -_LATC = 0x02D0; - - TRISD = 0x02D2; -_TRISD = 0x02D2; - PORTD = 0x02D4; -_PORTD = 0x02D4; - LATD = 0x02D6; -_LATD = 0x02D6; - - TRISE = 0x02D8; -_TRISE = 0x02D8; - PORTE = 0x02DA; -_PORTE = 0x02DA; - LATE = 0x02DC; -_LATE = 0x02DC; - - TRISF = 0x02DE; - -_TRISF = 0x02DE; - PORTF = 0x02E0; -_PORTF = 0x02E0; - LATF = 0x02E2; -_LATF = 0x02E2; - - - -/*========================================================================== -** -** Controller Area Network Module Register Definitions -** (for CAN Modules 1 and 2) -==========================================================================*/ - -/*========================================================================== -** -** CAN1 register definitions -** -==========================================================================*/ -C1RXF0SID = 0x0300; -_C1RXF0SID = 0x0300; -C1RXF0EIDH = 0x0302; -_C1RXF0EIDH = 0x0302; -C1RXF0EIDL = 0x0304; -_C1RXF0EIDL = 0x0304; -C1RXF1SID = 0x0308; -_C1RXF1SID = 0x0308; -C1RXF1EIDH = 0x030A; -_C1RXF1EIDH = 0x030A; -C1RXF1EIDL = 0x030C; -_C1RXF1EIDL = 0x030C; -C1RXF2SID = 0x0310; -_C1RXF2SID = 0x0310; -C1RXF2EIDH = 0x0312; -_C1RXF2EIDH = 0x0312; -C1RXF2EIDL = 0x0314; -_C1RXF2EIDL = 0x0314; -C1RXF3SID = 0x0318; -_C1RXF3SID = 0x0318; -C1RXF3EIDH = 0x031A; -_C1RXF3EIDH = 0x031A; -C1RXF3EIDL = 0x031C; -_C1RXF3EIDL = 0x031C; -C1RXF4SID = 0x0320; -_C1RXF4SID = 0x0320; -C1RXF4EIDH = 0x0322; -_C1RXF4EIDH = 0x0322; -C1RXF4EIDL = 0x0324; -_C1RXF4EIDL = 0x0324; -C1RXF5SID = 0x0328; -_C1RXF5SID = 0x0328; -C1RXF5EIDH = 0x032A; -_C1RXF5EIDH = 0x032A; -C1RXF5EIDL = 0x032C; -_C1RXF5EIDL = 0x032C; -C1RXM0SID = 0x0330; -_C1RXM0SID = 0x0330; -C1RXM0EIDH = 0x0332; -_C1RXM0EIDH = 0x0332; -C1RXM0EIDL = 0x0334; -_C1RXM0EIDL = 0x0334; -C1RXM1SID = 0x0338; -_C1RXM1SID = 0x0338; -C1RXM1EIDH = 0x033A; -_C1RXM1EIDH = 0x033A; -C1RXM1EIDL = 0x033C; -_C1RXM1EIDL = 0x033C; -C1TX2SID = 0x0340; -_C1TX2SID = 0x0340; -C1TX2EID = 0x0342; -_C1TX2EID = 0x0342; -C1TX2DLC = 0x0344; -_C1TX2DLC = 0x0344; -C1TX2B1 = 0x0346; -_C1TX2B1 = 0x0346; -C1TX2B2 = 0x0348; -_C1TX2B2 = 0x0348; -C1TX2B3 = 0x034A; -_C1TX2B3 = 0x034A; -C1TX2B4 = 0x034C; -_C1TX2B4 = 0x034C; -C1TX2CON = 0x034E; -_C1TX2CON = 0x034E; -C1TX1SID = 0x0350; -_C1TX1SID = 0x0350; -C1TX1EID = 0x0352; -_C1TX1EID = 0x0352; -C1TX1DLC = 0x0354; -_C1TX1DLC = 0x0354; -C1TX1B1 = 0x0356; -_C1TX1B1 = 0x0356; -C1TX1B2 = 0x0358; -_C1TX1B2 = 0x0358; -C1TX1B3 = 0x035A; -_C1TX1B3 = 0x035A; -C1TX1B4 = 0x035C; -_C1TX1B4 = 0x035C; -C1TX1CON = 0x035E; -_C1TX1CON = 0x035E; -C1TX0SID = 0x0360; -_C1TX0SID = 0x0360; -C1TX0EID = 0x0362; -_C1TX0EID = 0x0362; -C1TX0DLC = 0x0364; -_C1TX0DLC = 0x0364; -C1TX0B1 = 0x0366; -_C1TX0B1 = 0x0366; -C1TX0B2 = 0x0368; -_C1TX0B2 = 0x0368; -C1TX0B3 = 0x036A; -_C1TX0B3 = 0x036A; -C1TX0B4 = 0x036C; -_C1TX0B4 = 0x036C; -C1TX0CON = 0x036E; -_C1TX0CON = 0x036E; -C1RX1SID = 0x0370; -_C1RX1SID = 0x0370; -C1RX1EID = 0x0372; -_C1RX1EID = 0x0372; -C1RX1DLC = 0x0374; -_C1RX1DLC = 0x0374; -C1RX1B1 = 0x0376; -_C1RX1B1 = 0x0376; -C1RX1B2 = 0x0378; -_C1RX1B2 = 0x0378; -C1RX1B3 = 0x037A; -_C1RX1B3 = 0x037A; -C1RX1B4 = 0x037C; -_C1RX1B4 = 0x037C; -C1RX1CON = 0x037E; -_C1RX1CON = 0x037E; -C1RX0SID = 0x0380; -_C1RX0SID = 0x0380; -C1RX0EID = 0x0382; -_C1RX0EID = 0x0382; -C1RX0DLC = 0x0384; -_C1RX0DLC = 0x0384; -C1RX0B1 = 0x0386; -_C1RX0B1 = 0x0386; -C1RX0B2 = 0x0388; -_C1RX0B2 = 0x0388; -C1RX0B3 = 0x038A; -_C1RX0B3 = 0x038A; -C1RX0B4 = 0x038C; -_C1RX0B4 = 0x038C; -C1RX0CON = 0x038E; -_C1RX0CON = 0x038E; -C1CTRL = 0x0390; -_C1CTRL = 0x0390; -C1CFG1 = 0x0392; -_C1CFG1 = 0x0392; -C1CFG2 = 0x0394; -_C1CFG2 = 0x0394; -C1INTF = 0x0396; -_C1INTF = 0x0396; -C1INTE = 0x0398; -_C1INTE = 0x0398; -C1EC = 0x039A; -_C1EC = 0x039A; -C1RERRCNT = 0x039A; -_C1RERRCNT = 0x039A; -C1TERRCNT = 0x039B; -_C1TERRCNT = 0x039B; - -/*========================================================================== -** -** System Integration Block Registers -** -==========================================================================*/ - RCON = 0x0740; -_RCON = 0x0740; - OSCCON = 0x0742; -_OSCCON = 0x0742; - -/*========================================================================== -** -** Non Volatile Memory Registers -** -==========================================================================*/ - NVMCON = 0x0760; -_NVMCON = 0x0760; - NVMADR = 0x0762; -_NVMADR = 0x0762; - NVMADRU = 0x0764; -_NVMADRU = 0x0764; - NVMKEY = 0x0766; -_NVMKEY = 0x0766; - -/*========================================================================== -** -** Peripheral Module Disable Registers -** -==========================================================================*/ - PMD1 = 0x0770; -_PMD1 = 0x0770; - PMD2 = 0x0772; -_PMD2 = 0x0772; - PMD3 = 0x0774; -_PMD3 = 0x0774; -/* -**End of SFR Definitions required for both C and Assembly files -*/ - - -/*========================================================================= -** -**Start of Additional SFR Definitions that are required specifically -**for the C header file. -** -==========================================================================*/ - ACCA = 0x0022; -_ACCA = 0x0022; - ACCB = 0x0028; -_ACCB = 0x0028; - SRbits = 0x0042; -_SRbits = 0x0042; - CORCONbits = 0x0044; -_CORCONbits = 0x0044; - MODCONbits = 0x0046; -_MODCONbits = 0x0046; - XBREVbits = 0x0050; -_XBREVbits = 0x0050; - DISICNTbits = 0x0052; -_DISICNTbits = 0x0052; - INTCON1bits = 0x0080; -_INTCON1bits = 0x0080; - INTCON2bits = 0x0082; -_INTCON2bits = 0x0082; - IFS0bits = 0x0084; -_IFS0bits = 0x0084; - IFS1bits = 0x0086; -_IFS1bits = 0x0086; - IFS2bits = 0x0088; -_IFS2bits = 0x0088; - IEC0bits = 0x008C; -_IEC0bits = 0x008C; - IEC1bits = 0x008E; -_IEC1bits = 0x008E; - IEC2bits = 0x0090; -_IEC2bits = 0x0090; - IPC0bits = 0x0094; -_IPC0bits = 0x0094; - IPC1bits = 0x0096; -_IPC1bits = 0x0096; - IPC2bits = 0x0098; -_IPC2bits = 0x0098; - IPC3bits = 0x009A; -_IPC3bits = 0x009A; - IPC4bits = 0x009C; -_IPC4bits = 0x009C; - IPC5bits = 0x009E; -_IPC5bits = 0x009E; - IPC6bits = 0x00A0; -_IPC6bits = 0x00A0; - IPC9bits = 0x00A6; -_IPC9bits = 0x00A6; - IPC10bits = 0x00A8; -_IPC10bits = 0x00A8; - IPC11bits = 0x00AA; -_IPC11bits = 0x00AA; - CNEN1bits = 0x00C0; -_CNEN1bits = 0x00C0; - CNPU1bits = 0x00C4; -_CNPU1bits = 0x00C4; - T1CONbits = 0x0104; -_T1CONbits = 0x0104; - T2CONbits = 0x0110; -_T2CONbits = 0x0110; - T3CONbits = 0x0112; -_T3CONbits = 0x0112; - T4CONbits = 0x011E; -_T4CONbits = 0x011E; - T5CONbits = 0x0120; -_T5CONbits = 0x0120; - QEICONbits = 0x0122; -_QEICONbits = 0x0122; - DFLTCONbits = 0x0124; -_DFLTCONbits = 0x0124; - IC1CONbits = 0x0142; -_IC1CONbits = 0x0142; - IC2CONbits = 0x0146; -_IC2CONbits = 0x0146; - IC7CONbits = 0x015A; -_IC7CONbits = 0x015A; - IC8CONbits = 0x015E; -_IC8CONbits = 0x015E; - OC1CONbits = 0x0184; -_OC1CONbits = 0x0184; - OC2CONbits = 0x018A; -_OC2CONbits = 0x018A; - PTCONbits = 0x01C0; -_PTCONbits = 0x01C0; - PTMRbits = 0x01C2; -_PTMRbits = 0x01C2; - PTPERbits = 0x01C4; -_PTPERbits = 0x01C4; - SEVTCMPbits = 0x01C6; -_SEVTCMPbits = 0x01C6; - PWMCON1bits = 0x01C8; -_PWMCON1bits = 0x01C8; - PWMCON2bits = 0x01CA; -_PWMCON2bits = 0x01CA; - DTCON1bits = 0x01CC; -_DTCON1bits = 0x01CC; - FLTACONbits = 0x01D0; -_FLTACONbits = 0x01D0; - OVDCONbits = 0x01D4; -_OVDCONbits = 0x01D4; - I2CRCVbits = 0x0200; -_I2CRCVbits = 0x0200; - I2CTRNbits = 0x0202; -_I2CTRNbits = 0x0202; - I2CBRGbits = 0x0204; -_I2CBRGbits = 0x0204; - I2CCONbits = 0x0206; -_I2CCONbits = 0x0206; - I2CSTATbits = 0x0208; -_I2CSTATbits = 0x0208; - I2CADDbits = 0x020A; -_I2CADDbits = 0x020A; - U1MODEbits = 0x020C; -_U1MODEbits = 0x020C; - U1STAbits = 0x020E; -_U1STAbits = 0x020E; - U1TXREGbits = 0x0210; -_U1TXREGbits = 0x0210; - U1RXREGbits = 0x0212; -_U1RXREGbits = 0x0212; - SPI1STATbits = 0x0220; -_SPI1STATbits = 0x0220; - SPI1CONbits = 0x0222; -_SPI1CONbits = 0x0222; - ADCON1bits = 0x02A0; -_ADCON1bits = 0x02A0; - ADCON2bits = 0x02A2; -_ADCON2bits = 0x02A2; - ADCON3bits = 0x02A4; -_ADCON3bits = 0x02A4; - ADCHSbits = 0x02A6; -_ADCHSbits = 0x02A6; - ADPCFGbits = 0x02A8; -_ADPCFGbits = 0x02A8; - ADCSSLbits = 0x02AA; -_ADCSSLbits = 0x02AA; - TRISBbits = 0x02C6; -_TRISBbits = 0x02C6; - PORTBbits = 0x02C8; -_PORTBbits = 0x02C8; - LATBbits = 0x02CA; -_LATBbits = 0x02CA; - TRISCbits = 0x02CC; -_TRISCbits = 0x02CC; - PORTCbits = 0x02CE; -_PORTCbits = 0x02CE; - LATCbits = 0x02D0; -_LATCbits = 0x02D0; - TRISDbits = 0x02D2; -_TRISDbits = 0x02D2; - PORTDbits = 0x02D4; -_PORTDbits = 0x02D4; - LATDbits = 0x02D6; -_LATDbits = 0x02D6; - TRISEbits = 0x02D8; -_TRISEbits = 0x02D8; - PORTEbits = 0x02DA; -_PORTEbits = 0x02DA; - LATEbits = 0x02DC; -_LATEbits = 0x02DC; - TRISFbits = 0x02DE; -_TRISFbits = 0x02DE; - PORTFbits = 0x02E0; -_PORTFbits = 0x02E0; - - LATFbits = 0x02E2; -_LATFbits = 0x02E2; - C1RXF0SIDbits = 0x0300; -_C1RXF0SIDbits = 0x0300; - C1RXF0EIDHbits = 0x0302; -_C1RXF0EIDHbits = 0x0302; - C1RXF0EIDLbits = 0x0304; -_C1RXF0EIDLbits = 0x0304; - C1RXF1SIDbits = 0x0308; -_C1RXF1SIDbits = 0x0308; - C1RXF1EIDHbits = 0x030A; -_C1RXF1EIDHbits = 0x030A; - C1RXF1EIDLbits = 0x030C; -_C1RXF1EIDLbits = 0x030C; - C1RXF2SIDbits = 0x0310; -_C1RXF2SIDbits = 0x0310; - C1RXF2EIDHbits = 0x0312; -_C1RXF2EIDHbits = 0x0312; - C1RXF2EIDLbits = 0x0314; -_C1RXF2EIDLbits = 0x0314; - C1RXF3SIDbits = 0x0318; -_C1RXF3SIDbits = 0x0318; - C1RXF3EIDHbits = 0x031A; -_C1RXF3EIDHbits = 0x031A; - C1RXF3EIDLbits = 0x031C; -_C1RXF3EIDLbits = 0x031C; - C1RXF4SIDbits = 0x0320; -_C1RXF4SIDbits = 0x0320; - C1RXF4EIDHbits = 0x0322; -_C1RXF4EIDHbits = 0x0322; - C1RXF4EIDLbits = 0x0324; -_C1RXF4EIDLbits = 0x0324; - C1RXF5SIDbits = 0x0328; -_C1RXF5SIDbits = 0x0328; - C1RXF5EIDHbits = 0x032A; -_C1RXF5EIDHbits = 0x032A; - C1RXF5EIDLbits = 0x032C; -_C1RXF5EIDLbits = 0x032C; - C1RXM0SIDbits = 0x0330; -_C1RXM0SIDbits = 0x0330; - C1RXM0EIDHbits = 0x0332; -_C1RXM0EIDHbits = 0x0332; - C1RXM0EIDLbits = 0x0334; -_C1RXM0EIDLbits = 0x0334; - C1RXM1SIDbits = 0x0338; -_C1RXM1SIDbits = 0x0338; - C1RXM1EIDHbits = 0x033A; -_C1RXM1EIDHbits = 0x033A; - C1RXM1EIDLbits = 0x033C; -_C1RXM1EIDLbits = 0x033C; - C1TX2SIDbits = 0x0340; -_C1TX2SIDbits = 0x0340; - C1TX2EIDbits = 0x0342; -_C1TX2EIDbits = 0x0342; - C1TX2DLCbits = 0x0344; -_C1TX2DLCbits = 0x0344; - C1TX2B1bits = 0x0346; -_C1TX2B1bits = 0x0346; - C1TX2B2bits = 0x0348; -_C1TX2B2bits = 0x0348; - C1TX2B3bits = 0x034A; -_C1TX2B3bits = 0x034A; - C1TX2B4bits = 0x034C; -_C1TX2B4bits = 0x034C; - C1TX2CONbits = 0x034E; -_C1TX2CONbits = 0x034E; - C1TX1SIDbits = 0x0350; -_C1TX1SIDbits = 0x0350; - C1TX1EIDbits = 0x0352; -_C1TX1EIDbits = 0x0352; - C1TX1DLCbits = 0x0354; -_C1TX1DLCbits = 0x0354; - C1TX1B1bits = 0x0356; -_C1TX1B1bits = 0x0356; - C1TX1B2bits = 0x0358; -_C1TX1B2bits = 0x0358; - C1TX1B3bits = 0x035A; -_C1TX1B3bits = 0x035A; - C1TX1B4bits = 0x035C; -_C1TX1B4bits = 0x035C; - C1TX1CONbits = 0x035E; -_C1TX1CONbits = 0x035E; - C1TX0SIDbits = 0x0360; -_C1TX0SIDbits = 0x0360; - C1TX0EIDbits = 0x0362; -_C1TX0EIDbits = 0x0362; - C1TX0DLCbits = 0x0364; -_C1TX0DLCbits = 0x0364; - C1TX0B1bits = 0x0366; -_C1TX0B1bits = 0x0366; - C1TX0B2bits = 0x0368; -_C1TX0B2bits = 0x0368; - C1TX0B3bits = 0x036A; -_C1TX0B3bits = 0x036A; - C1TX0B4bits = 0x036C; -_C1TX0B4bits = 0x036C; - C1TX0CONbits = 0x036E; -_C1TX0CONbits = 0x036E; - C1RX1SIDbits = 0x0370; -_C1RX1SIDbits = 0x0370; - C1RX1EIDbits = 0x0372; -_C1RX1EIDbits = 0x0372; - C1RX1DLCbits = 0x0374; -_C1RX1DLCbits = 0x0374; - C1RX1B1bits = 0x0376; -_C1RX1B1bits = 0x0376; - C1RX1B2bits = 0x0378; -_C1RX1B2bits = 0x0378; - C1RX1B3bits = 0x037A; -_C1RX1B3bits = 0x037A; - C1RX1B4bits = 0x037C; -_C1RX1B4bits = 0x037C; - C1RX1CONbits = 0x037E; -_C1RX1CONbits = 0x037E; - C1RX0SIDbits = 0x0380; -_C1RX0SIDbits = 0x0380; - C1RX0EIDbits = 0x0382; -_C1RX0EIDbits = 0x0382; - C1RX0DLCbits = 0x0384; -_C1RX0DLCbits = 0x0384; - C1RX0B1bits = 0x0386; -_C1RX0B1bits = 0x0386; - C1RX0B2bits = 0x0388; -_C1RX0B2bits = 0x0388; - C1RX0B3bits = 0x038A; -_C1RX0B3bits = 0x038A; - C1RX0B4bits = 0x038C; -_C1RX0B4bits = 0x038C; - C1RX0CONbits = 0x038E; -_C1RX0CONbits = 0x038E; - C1CTRLbits = 0x0390; -_C1CTRLbits = 0x0390; - C1CFG1bits = 0x0392; -_C1CFG1bits = 0x0392; - C1CFG2bits = 0x0394; -_C1CFG2bits = 0x0394; - C1INTFbits = 0x0396; -_C1INTFbits = 0x0396; - C1INTEbits = 0x0398; -_C1INTEbits = 0x0398; - C1ECbits = 0x039A; -_C1ECbits = 0x039A; - - RCONbits = 0x0740; -_RCONbits = 0x0740; - OSCCONbits = 0x742; -_OSCCONbits = 0x742; - NVMCONbits = 0x0760; -_NVMCONbits = 0x0760; - PMD1bits = 0x0770; -_PMD1bits = 0x0770; - PMD2bits = 0x0772; -_PMD2bits = 0x0772; - PMD3bits = 0x0774; -_PMD3bits = 0x0774; -/* -**end of SFR definitions required for C header -*/ - -/* SFR base address definitions for various peripherals */ - - IC1 = 0x0140; -_IC1 = 0x0140; - IC2 = 0x0144; -_IC2 = 0x0144; - IC3 = 0x0148; -_IC3 = 0x0148; - IC4 = 0x014C; -_IC4 = 0x014C; - - OC1 = 0x0180; -_OC1 = 0x0180; - OC2 = 0x0186; -_OC2 = 0x0186; - - UART1 = 0x020C; -_UART1 = 0x020C; - - SPI1 = 0x0220; -_SPI1 = 0x0220; - - CAN1 = 0x0300; -_CAN1 = 0x0300; - -/*========================================================================= -**end of SFR definitions required in Data Space -*========================================================================*/ - diff --git a/include/p30f4012.h b/include/p30f4012.h deleted file mode 100644 index 8a368cf..0000000 --- a/include/p30f4012.h +++ /dev/null @@ -1,3025 +0,0 @@ - -/*------------------------------------------------------------------------- - * - * MPLAB-C30 dsPIC30F4012 processor header - * - * (c) Copyright 2005 Microchip Technology, All rights reserved - * - * File Description / Notes: - * ========================= - * 1] This header file defines special function registers (SFR), and useful - * macros for the dsPIC30Fxxxx Family of Digital Signal - * Controllers (also referred to as the dsPIC). - * 2] The register and bit names used in this file match the - * dsPIC30Fxxxx data sheets as closely as possible. - * 3] The memory locations of the registers defined in this header file are - * specified in the respective linker scripts. - * 4] SFR definitions are listed in the ascending order of memory addresses - * and are grouped based on the module they belong to. For e.g., WREG10 - * is listed before ACCAL, and the Core SFRs are grouped separately - * from the Interrupt Controller SFRs or the General Purpose Timer SFRs. - * - * Revision History: - * ================= - * -------------------------------------------------------------------------- - * Rev: Date: Details: Who: - * -------------------------------------------------------------------------- - * 2.0 23 Apr 2003 New file P Sinha - * 2.0a 24 Apr 2003 Added CEID bit P Sinha - * 2.0b 30 Apr 2003 Removed suffix 'B' from device number P Sinha - * 2.0c 2 May 2003 'H' suffix added to CiRXFnEID/CiRXMnEID P Sinha - * 2.1 2 Jun 2003 Relocated CANCAP bit to CxCTRL P Sinha - * 2.2 17 Jun 2003 Renamed CONV bit to DONE P Sinha - * 2.3 20 Jun 2003 Corrections in Config Fuses comments P Sinha - * 2.3a 23 Jun 2003 Typos in CAN structure corrected P Sinha - * 2.3b 5 Aug 2003 Added TUN1-4 bits in OSCCON P Sinha - * 2.3c 18 Sep 2003 DFLTCON changes P Sinha - * 2.4 10 Oct 2003 Added macros for data allocation and ISRs P Sinha - * 2.5 25 Nov 2003 Renamed TUN1-4 bits to TUNF0-3 P Sinha - * 3.0 30 Mar 2004 Added defines for unique SFR bit names P Sinha - * 3.1 5 Apr 2004 Added underscore before SFR bit labels P Sinha - * 3.1a 8 Apr 2004 Added config macros for FRC w/ PLL modes P Sinha - * 3.2 11 Apr 2004 Enhanced config macro usage examples P Sinha - * 3.3 14 Apr 2004 Corrected a typo in the _U1RXIE bit label P Sinha - * 4.0 28 Sep 2004 Changed data allocation macro definitions P Sinha - * 4.1 22 Dec 2004 Corrected a typo in the _U1RXIE definition P Sinha - * 4.1a 14 Mar 2005 Removed LVD definitions P Sinha - * 4.2 4 Apr 2005 Renamed EC_IO to ECIO and ERC_IO to ERCIO P Sinha - * 4.2a 27 Jun 2005 Fixed typos in comments regarding macros G McCar - * 4.3 1 Jul 2005 Updated section syntax in config macros P Sinha - * -------------------------------------------------------------------------- - * - * ------------------------------------------------------------------------*/ - -#ifndef __30F4012_H -#define __30F4012_H - -/* ------------------------- */ -/* Core Register Definitions */ -/* ------------------------- */ - -/* W registers W0-W15 */ -extern volatile unsigned int WREG0 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG1 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG2 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG3 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG4 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG5 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG6 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG7 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG8 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG9 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG10 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG11 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG12 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG13 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG14 __attribute__((__sfr__,__deprecated__,__unsafe__)); -extern volatile unsigned int WREG15 __attribute__((__sfr__,__deprecated__,__unsafe__)); - -/* SPLIM: Stack Pointer Limit */ -extern volatile unsigned int SPLIM __attribute__((__sfr__)); - -/* Alternative access structure for the 40-bit accumulators */ -typedef struct tagACC { - unsigned int L; - unsigned int H; - unsigned char U; -} ACC; - -/* Acc A<15:0> */ -extern volatile unsigned int ACCAL __attribute__((__sfr__)); - -/* Acc A<31:16> */ -extern volatile unsigned int ACCAH __attribute__((__sfr__)); - -/* Acc A<39:32> */ -extern volatile unsigned char ACCAU __attribute__((__sfr__)); - -/* Acc A defined as a structure consisting of the 3 parts */ -extern volatile ACC ACCA __attribute__((__sfr__)); - -/* Acc B<15:0> */ -extern volatile unsigned int ACCBL __attribute__((__sfr__)); - -/* Acc B<31:16> */ -extern volatile unsigned int ACCBH __attribute__((__sfr__)); - -/* Acc B<39:32> */ -extern volatile unsigned char ACCBU __attribute__((__sfr__)); - -/* Acc B defined as a structure consisting of the 3 parts */ -extern volatile ACC ACCB __attribute__((__sfr__)); - -/* PCL: Program Counter low word */ -extern volatile unsigned int PCL __attribute__((__sfr__)); - -/* PCH: Program Counter high byte */ -extern volatile unsigned char PCH __attribute__((__sfr__)); - -/* TBLPAG: Table Page Register */ -extern volatile unsigned char TBLPAG __attribute__((__sfr__)); - -/* PSVPAG: Program Space Visibility Page Register */ -extern volatile unsigned char PSVPAG __attribute__((__sfr__)); - -/* RCOUNT: REPEAT loop count */ -extern volatile unsigned int RCOUNT __attribute__((__sfr__)); - -/* DCOUNT: DO loop count */ -extern volatile unsigned int DCOUNT __attribute__((__sfr__)); - -/* DOSTARTL: DO loop start address bits <15:0> */ -extern volatile unsigned int DOSTARTL __attribute__((__sfr__)); - -/* DOSTARTH: DO loop start address bits <23:16> */ -extern volatile unsigned int DOSTARTH __attribute__((__sfr__)); - -/* DOENDL: DO loop end address bits <15:0> */ -extern volatile unsigned int DOENDL __attribute__((__sfr__)); - -/* DOENDH: DO loop end address bits <23:16> */ -extern volatile unsigned int DOENDH __attribute__((__sfr__)); - -/* SR: Status Register */ -extern volatile unsigned int SR __attribute__((__sfr__)); -typedef struct tagSRBITS { - unsigned C :1; /* Carry flag */ - unsigned Z :1; /* Sticky Zero flag */ - unsigned OV :1; /* Overflow flag */ - unsigned N :1; /* Negative flag */ - unsigned RA :1; /* REPEAT loop active flag */ - unsigned IPL :3; /* CPU Interrupt Priority Level */ - unsigned DC :1; /* Digit Carry flag */ - unsigned DA :1; /* DO loop active flag */ - unsigned SAB :1; /* Combined A/B saturation flag */ - unsigned OAB :1; /* Combined A/B overflow flag */ - unsigned SB :1; /* Acc B saturation flag */ - unsigned SA :1; /* Acc A saturation flag */ - unsigned OB :1; /* Acc B overflow flag */ - unsigned OA :1; /* Acc A overflow flag */ -} SRBITS; -extern volatile SRBITS SRbits __attribute__((__sfr__)); - -/* CORCON: CPU Mode control Register */ -extern volatile unsigned int CORCON __attribute__((__sfr__)); -typedef struct tagCORCONBITS { - unsigned IF :1; /* Integer/Fractional mode */ - unsigned RND :1; /* Rounding mode */ - unsigned PSV :1; /* Program Space Visibility enable */ - unsigned IPL3 :1; /* CPU Interrupt Priority Level bit 3 */ - unsigned ACCSAT :1; /* Acc saturation mode */ - unsigned SATDW :1; /* Data space write saturation enable */ - unsigned SATB :1; /* Acc B saturation enable */ - unsigned SATA :1; /* Acc A saturation enable */ - unsigned DL :3; /* DO loop nesting level status */ - unsigned EDT :1; /* Early DO loop termination control */ - unsigned US :1; /* Signed/Unsigned mode */ - unsigned :3; -} CORCONBITS; -extern volatile CORCONBITS CORCONbits __attribute__((__sfr__)); - -/* MODCON: Modulo Addressing Control Register */ -extern volatile unsigned int MODCON __attribute__((__sfr__)); -typedef struct tagMODCONBITS { - unsigned XWM :4; /* X-RAGU/X-WAGU modulo addressing register select */ - unsigned YWM :4; /* Y-RAGU modulo addressing register select */ - unsigned BWM :4; /* Bit-reversed addressing register select */ - unsigned :2; - unsigned YMODEN :1; /* Y-RAGU modulo addressing enable */ - unsigned XMODEN :1; /* X-RAGU/X-WAGU modulo addressing enable */ -} MODCONBITS; -extern volatile MODCONBITS MODCONbits __attribute__((__sfr__)); - -/* XMODSRT: X-RAGU/X-WAGU modulo buffer start address */ -extern volatile unsigned int XMODSRT __attribute__((__sfr__)); - -/* XMODEND: X-RAGU/X-WAGU modulo buffer end address */ -extern volatile unsigned int XMODEND __attribute__((__sfr__)); - -/* YMODSRT: Y-RAGU modulo buffer start address */ -extern volatile unsigned int YMODSRT __attribute__((__sfr__)); - -/* YMODEND: Y-RAGU modulo buffer end address */ -extern volatile unsigned int YMODEND __attribute__((__sfr__)); - -/* XBREV: X-WAGU Bit-reversed Addressing Control Register */ -extern volatile unsigned int XBREV __attribute__((__sfr__)); -typedef struct tagXBREVBITS { - unsigned XB :15; /* Bit-reversed addressing register select */ - unsigned BREN :1; /* Bit-reversed addressing enable */ -} XBREVBITS; -extern volatile XBREVBITS XBREVbits __attribute__((__sfr__)); - -/* DISICNT: Disable Interrupt Cycle Count */ -extern volatile unsigned int DISICNT __attribute__((__sfr__)); -typedef struct tagDISICNTBITS { - unsigned DISICNT:14; - unsigned :2; -} DISICNTBITS; -extern volatile DISICNTBITS DISICNTbits __attribute__((__sfr__)); - - -/* ----------------------------------------- */ -/* Interrupt Controller register definitions */ -/* ----------------------------------------- */ - -/* INTCON1: Interrupt Control Register 1 */ -extern volatile unsigned int INTCON1 __attribute__((__sfr__)); -typedef struct tagINTCON1BITS { - unsigned :1; - unsigned OSCFAIL:1; - unsigned STKERR :1; - unsigned ADDRERR:1; - unsigned MATHERR:1; - unsigned :3; - unsigned COVTE :1; - unsigned OVBTE :1; - unsigned OVATE :1; - unsigned :4; - unsigned NSTDIS :1; -} INTCON1BITS; -extern volatile INTCON1BITS INTCON1bits __attribute__((__sfr__)); - -/* INTCON2: Interrupt Control Register 2 */ -extern volatile unsigned int INTCON2 __attribute__((__sfr__)); -typedef struct tagINTCON2BITS { - unsigned INT0EP :1; - unsigned INT1EP :1; - unsigned INT2EP :1; - unsigned :11; - unsigned DISI :1; - unsigned ALTIVT :1; -} INTCON2BITS; -extern volatile INTCON2BITS INTCON2bits __attribute__((__sfr__)); - -/* IFS0: Interrupt Flag Status Register 0 */ -extern volatile unsigned int IFS0 __attribute__((__sfr__)); -typedef struct tagIFS0BITS { - unsigned INT0IF :1; - unsigned IC1IF :1; - unsigned OC1IF :1; - unsigned T1IF :1; - unsigned IC2IF :1; - unsigned OC2IF :1; - unsigned T2IF :1; - unsigned T3IF :1; - unsigned SPI1IF :1; - unsigned U1RXIF :1; - unsigned U1TXIF :1; - unsigned ADIF :1; - unsigned NVMIF :1; - unsigned SI2CIF :1; - unsigned MI2CIF :1; - unsigned CNIF :1; -} IFS0BITS; -extern volatile IFS0BITS IFS0bits __attribute__((__sfr__)); - -/* IFS1: Interrupt Flag Status Register 1 */ -extern volatile unsigned int IFS1 __attribute__((__sfr__)); -typedef struct tagIFS1BITS { - unsigned INT1IF :1; - unsigned IC7IF :1; - unsigned IC8IF :1; - unsigned :2; - unsigned T4IF :1; - unsigned T5IF :1; - unsigned INT2IF :1; - unsigned :3; - unsigned C1IF :1; - unsigned :4; -} IFS1BITS; -extern volatile IFS1BITS IFS1bits __attribute__((__sfr__)); - -/* IFS2: Interrupt Flag Status Register 2 */ -extern volatile unsigned int IFS2 __attribute__((__sfr__)); -typedef struct tagIFS2BITS { - unsigned :7; - unsigned PWMIF :1; - unsigned QEIIF :1; - unsigned :2; - unsigned FLTAIF :1; - unsigned :4; -} IFS2BITS; -extern volatile IFS2BITS IFS2bits __attribute__((__sfr__)); - -/* IEC0: Interrupt Enable Control Register 0 */ -extern volatile unsigned int IEC0 __attribute__((__sfr__)); -typedef struct tagIEC0BITS { - unsigned INT0IE :1; - unsigned IC1IE :1; - unsigned OC1IE :1; - unsigned T1IE :1; - unsigned IC2IE :1; - unsigned OC2IE :1; - unsigned T2IE :1; - unsigned T3IE :1; - unsigned SPI1IE :1; - unsigned U1RXIE :1; - unsigned U1TXIE :1; - unsigned ADIE :1; - unsigned NVMIE :1; - unsigned SI2CIE :1; - unsigned MI2CIE :1; - unsigned CNIE :1; -} IEC0BITS; -extern volatile IEC0BITS IEC0bits __attribute__((__sfr__)); - -/* IEC1: Interrupt Enable Control Register 1 */ -extern volatile unsigned int IEC1 __attribute__((__sfr__)); -typedef struct tagIEC1BITS { - unsigned INT1IE :1; - unsigned IC7IE :1; - unsigned IC8IE :1; - unsigned :2; - unsigned T4IE :1; - unsigned T5IE :1; - unsigned INT2IE :1; - unsigned :3; - unsigned C1IE :1; - unsigned :4; -} IEC1BITS; -extern volatile IEC1BITS IEC1bits __attribute__((__sfr__)); - -/* IEC2: Interrupt Enable Control Register 2 */ -extern volatile unsigned int IEC2 __attribute__((__sfr__)); -typedef struct tagIEC2BITS { - unsigned :7; - unsigned PWMIE :1; - unsigned QEIIE :1; - unsigned :2; - unsigned FLTAIE :1; - unsigned :4; -} IEC2BITS; -extern volatile IEC2BITS IEC2bits __attribute__((__sfr__)); - -/* IPC0: Interrupt Priority Control Register 0 */ -extern volatile unsigned int IPC0 __attribute__((__sfr__)); -typedef struct tagIPC0BITS { - unsigned INT0IP :3; - unsigned :1; - unsigned IC1IP :3; - unsigned :1; - unsigned OC1IP :3; - unsigned :1; - unsigned T1IP :3; - unsigned :1; -} IPC0BITS; -extern volatile IPC0BITS IPC0bits __attribute__((__sfr__)); - -/* IPC1: Interrupt Priority Control Register 1 */ -extern volatile unsigned int IPC1 __attribute__((__sfr__)); -typedef struct tagIPC1BITS { - unsigned IC2IP :3; - unsigned :1; - unsigned OC2IP :3; - unsigned :1; - unsigned T2IP :3; - unsigned :1; - unsigned T3IP :3; - unsigned :1; -} IPC1BITS; -extern volatile IPC1BITS IPC1bits __attribute__((__sfr__)); - -/* IPC2: Interrupt Priority Control Register 2 */ -extern volatile unsigned int IPC2 __attribute__((__sfr__)); -typedef struct tagIPC2BITS { - unsigned SPI1IP :3; - unsigned :1; - unsigned U1RXIP :3; - unsigned :1; - unsigned U1TXIP :3; - unsigned :1; - unsigned ADIP :3; - unsigned :1; -} IPC2BITS; -extern volatile IPC2BITS IPC2bits __attribute__((__sfr__)); - -/* IPC3: Interrupt Priority Control Register 3 */ -extern volatile unsigned int IPC3 __attribute__((__sfr__)); -typedef struct tagIPC3BITS { - unsigned NVMIP :3; - unsigned :1; - unsigned SI2CIP :3; - unsigned :1; - unsigned MI2CIP :3; - unsigned :1; - unsigned CNIP :3; - unsigned :1; -} IPC3BITS; -extern volatile IPC3BITS IPC3bits __attribute__((__sfr__)); - -/* IPC4: Interrupt Priority Control Register 4 */ -extern volatile unsigned int IPC4 __attribute__((__sfr__)); -typedef struct tagIPC4BITS { - unsigned INT1IP :3; - unsigned :1; - unsigned IC7IP :3; - unsigned :1; - unsigned IC8IP :3; - unsigned :5; -} IPC4BITS; -extern volatile IPC4BITS IPC4bits __attribute__((__sfr__)); - -/* IPC5: Interrupt Priority Control Register 5 */ -extern volatile unsigned int IPC5 __attribute__((__sfr__)); -typedef struct tagIPC5BITS { - unsigned :4; - unsigned T4IP :3; - unsigned :1; - unsigned T5IP :3; - unsigned :1; - unsigned INT2IP :3; - unsigned :1; -} IPC5BITS; -extern volatile IPC5BITS IPC5bits __attribute__((__sfr__)); - -/* IPC6: Interrupt Priority Control Register 6 */ -extern volatile unsigned int IPC6 __attribute__((__sfr__)); -typedef struct tagIPC6BITS { - unsigned :12; - unsigned C1IP :3; - unsigned :1; -} IPC6BITS; -extern volatile IPC6BITS IPC6bits __attribute__((__sfr__)); - -/* IPC9: Interrupt Priority Control Register 9 */ -extern volatile unsigned int IPC9 __attribute__((__sfr__)); -typedef struct tagIPC9BITS { - unsigned :12; - unsigned PWMIP :3; - unsigned :1; -} IPC9BITS; -extern volatile IPC9BITS IPC9bits __attribute__((__sfr__)); - -/* IPC10: Interrupt Priority Control Register 10 */ -extern volatile unsigned int IPC10 __attribute__((__sfr__)); -typedef struct tagIPC10BITS { - unsigned QEIIP :3; - unsigned :9; - unsigned FLTAIP :3; - unsigned :1; -} IPC10BITS; -extern volatile IPC10BITS IPC10bits __attribute__((__sfr__)); - -/* ---------------------------------------------- */ -/* Input Change Notification register definitions */ -/* ---------------------------------------------- */ - -/* CNEN1: Input Change Notification Interrupt Enable Register 1 */ -extern volatile unsigned int CNEN1 __attribute__((__sfr__)); -typedef struct tagCNEN1BITS { - unsigned CN0IE :1; - unsigned CN1IE :1; - unsigned CN2IE :1; - unsigned CN3IE :1; - unsigned CN4IE :1; - unsigned CN5IE :1; - unsigned CN6IE :1; - unsigned CN7IE :1; - unsigned :8; -} CNEN1BITS; -extern volatile CNEN1BITS CNEN1bits __attribute__((__sfr__)); - -/* CNPU1: Input Change Notification Pullup Enable Register 1 */ -extern volatile unsigned int CNPU1 __attribute__((__sfr__)); -typedef struct tagCNPU1BITS { - unsigned CN0PUE :1; - unsigned CN1PUE :1; - unsigned CN2PUE :1; - unsigned CN3PUE :1; - unsigned CN4PUE :1; - unsigned CN5PUE :1; - unsigned CN6PUE :1; - unsigned CN7PUE :1; - unsigned :8; -} CNPU1BITS; -extern volatile CNPU1BITS CNPU1bits __attribute__((__sfr__)); - - -/* --------------------------- */ -/* Timer1 register definitions */ -/* --------------------------- */ - -/* Generic structure for Timer 1 Control Register */ -typedef struct tagTCON_16BIT { - unsigned :1; - unsigned TCS :1; - unsigned TSYNC :1; - unsigned :1; - unsigned TCKPS :2; - unsigned TGATE :1; - unsigned :6; - unsigned TSIDL :1; - unsigned :1; - unsigned TON :1; -} TCON_16BIT; - -/* TMR1: Timer 1 Count Register */ -extern volatile unsigned int TMR1 __attribute__((__sfr__)); - -/* PR1: Timer 1 Period Register */ -extern volatile unsigned int PR1 __attribute__((__sfr__)); - -/* T1CON: Timer 1 Control Register */ -extern volatile unsigned int T1CON __attribute__((__sfr__)); -extern volatile TCON_16BIT T1CONbits __attribute__((__sfr__)); - -/* ----------------------------- */ -/* Timer2/3 register definitions */ -/* ----------------------------- */ - -/* Generic structure for Timer 2 and Timer 4 Control Registers */ -typedef struct tagTCON_EVEN { - unsigned :1; - unsigned TCS :1; - unsigned :1; - unsigned T32 :1; - unsigned TCKPS :2; - unsigned TGATE :1; - unsigned :6; - unsigned TSIDL :1; - unsigned :1; - unsigned TON :1; -} TCON_EVEN; - -/* Generic structure for Timer 3 and Timer 5 Control Registers */ -typedef struct tagTCON_ODD { - unsigned :1; - unsigned TCS :1; - unsigned :2; - unsigned TCKPS :2; - unsigned TGATE :1; - unsigned :6; - unsigned TSIDL :1; - unsigned :1; - unsigned TON :1; -} TCON_ODD; - -/* TMR2: Timer 2 Count Register */ -extern volatile unsigned int TMR2 __attribute__((__sfr__)); - -/* TMR3HLD: Timer 3 Holding Register */ -extern volatile unsigned int TMR3HLD __attribute__((__sfr__)); - -/* TMR3: Timer 3 Count Register */ -extern volatile unsigned int TMR3 __attribute__((__sfr__)); - -/* PR2: Timer 2 Period Register */ -extern volatile unsigned int PR2 __attribute__((__sfr__)); - -/* PR3: Timer 3 Period Register */ -extern volatile unsigned int PR3 __attribute__((__sfr__)); - -/* T2CON: Timer 2 Control Register */ -extern volatile unsigned int T2CON __attribute__((__sfr__)); -extern volatile TCON_EVEN T2CONbits __attribute__((__sfr__)); - -/* T3CON: Timer 3 Control Register */ -extern volatile unsigned int T3CON __attribute__((__sfr__)); -extern volatile TCON_ODD T3CONbits __attribute__((__sfr__)); - -/* ----------------------------- */ -/* Timer4/5 register definitions */ -/* ----------------------------- */ - -/* TMR4: Timer 4 Count Register */ -extern volatile unsigned int TMR4 __attribute__((__sfr__)); - -/* TMR5HLD: Timer 5 Holding Register */ -extern volatile unsigned int TMR5HLD __attribute__((__sfr__)); - -/* TMR5: Timer 5 Count Register */ -extern volatile unsigned int TMR5 __attribute__((__sfr__)); - -/* PR4: Timer 4 Period Register */ -extern volatile unsigned int PR4 __attribute__((__sfr__)); - -/* PR5: Timer 5 Period Register */ -extern volatile unsigned int PR5 __attribute__((__sfr__)); - -/* T4CON: Timer 4 Control Register */ -extern volatile unsigned int T4CON __attribute__((__sfr__)); -extern volatile TCON_EVEN T4CONbits __attribute__((__sfr__)); - -/* T5CON: Timer 5 Control Register */ -extern volatile unsigned int T5CON __attribute__((__sfr__)); -extern volatile TCON_ODD T5CONbits __attribute__((__sfr__)); - -/* ------------------------------------------------- */ -/* Quadrature Encoder Interface register definitions */ -/* ------------------------------------------------- */ - -/* QEICON: QEI Control Register */ -extern volatile unsigned int QEICON __attribute__((__sfr__)); -typedef struct tagQEICONBITS { - unsigned UPDN_SRC:1; - unsigned TQCS :1; - unsigned POSRES :1; - unsigned TQCKPS :2; - unsigned TQGATE :1; - unsigned PCDOUT :1; - unsigned SWPAB :1; - unsigned QEIM :3; - unsigned UPDN :1; - unsigned INDX :1; - unsigned QEISIDL:1; - unsigned :1; - unsigned CNTERR :1; -} QEICONBITS; -extern volatile QEICONBITS QEICONbits __attribute__((__sfr__)); - -/* DFLTCON: Digital Filter Control Register */ -extern volatile unsigned int DFLTCON __attribute__((__sfr__)); -typedef struct tagDFLTCONBITS { - unsigned :4; - unsigned QECK :3; - unsigned QEOUT :1; - unsigned CEID :1; - unsigned IMV :2; - unsigned :5; -} DFLTCONBITS; -extern volatile DFLTCONBITS DFLTCONbits __attribute__((__sfr__)); - -/* POSCNT: Position Counter Register */ -extern volatile unsigned int POSCNT __attribute__((__sfr__)); - -/* MAXCNT: Maximum Count Register */ -extern volatile unsigned int MAXCNT __attribute__((__sfr__)); - -/* ---------------------------------- */ -/* Input Capture register definitions */ -/* ---------------------------------- */ - -/* Generic structure of entire SFR area for each Input Capture module */ -typedef struct tagIC { - unsigned int icxbuf; - unsigned int icxcon; -} IC, *PIC; - -/* SFR blocks for each Input Capture module */ -extern volatile IC IC1 __attribute__((__sfr__)); -extern volatile IC IC2 __attribute__((__sfr__)); -extern volatile IC IC7 __attribute__((__sfr__)); -extern volatile IC IC8 __attribute__((__sfr__)); - -/* Generic structure for Input Capture Control Registers */ -typedef struct tagICxCONBITS { - unsigned ICM :3; - unsigned ICBNE :1; - unsigned ICOV :1; - unsigned ICI :2; - unsigned ICTMR :1; - unsigned :5; - unsigned ICSIDL :1; - unsigned :2; -} ICxCONBITS; - -/* IC1BUF: Input Capture 1 Buffer */ -extern volatile unsigned int IC1BUF __attribute__((__sfr__)); - -/* IC1CON: Input Capture 1 Control Register */ -extern volatile unsigned int IC1CON __attribute__((__sfr__)); -extern volatile ICxCONBITS IC1CONbits __attribute__((__sfr__)); - -/* IC2BUF: Input Capture 2 Buffer */ -extern volatile unsigned int IC2BUF __attribute__((__sfr__)); - -/* IC2CON: Input Capture 2 Control Register */ -extern volatile unsigned int IC2CON __attribute__((__sfr__)); -extern volatile ICxCONBITS IC2CONbits __attribute__((__sfr__)); - -/* IC7BUF: Input Capture 7 Buffer */ -extern volatile unsigned int IC7BUF __attribute__((__sfr__)); - -/* IC7CON: Input Capture 7 Control Register */ -extern volatile unsigned int IC7CON __attribute__((__sfr__)); -extern volatile ICxCONBITS IC7CONbits __attribute__((__sfr__)); - -/* IC8BUF: Input Capture 8 Buffer */ -extern volatile unsigned int IC8BUF __attribute__((__sfr__)); - -/* IC8CON: Input Capture 8 Control Register */ -extern volatile unsigned int IC8CON __attribute__((__sfr__)); -extern volatile ICxCONBITS IC8CONbits __attribute__((__sfr__)); - - -/* --------------------------------------- */ -/* Output Compare/PWM register definitions */ -/* --------------------------------------- */ - -/* Generic structure of entire SFR area for each Output Compare module */ -typedef struct tagOC { - unsigned int ocxrs; - unsigned int ocxr; - unsigned int ocxcon; -} OC, *POC; - -/* SFR blocks for each Output Compare module */ -extern volatile OC OC1 __attribute__((__sfr__)); -extern volatile OC OC2 __attribute__((__sfr__)); - -/* Generic structure for Output Compare Control Registers */ -typedef struct tagOCxCONBITS { - unsigned OCM :3; - unsigned OCTSEL :1; - unsigned OCFLT :1; - unsigned :8; - unsigned OCSIDL :1; - unsigned :2; -} OCxCONBITS; - -/* OC1RS: Output Compare 1 Secondary Register */ -extern volatile unsigned int OC1RS __attribute__((__sfr__)); - -/* OC1R: Output Compare 1 Main Register */ -extern volatile unsigned int OC1R __attribute__((__sfr__)); - -/* OC1CON: Output Compare 1 Control Register */ -extern volatile unsigned int OC1CON __attribute__((__sfr__)); -extern volatile OCxCONBITS OC1CONbits __attribute__((__sfr__)); - -/* OC2RS: Output Compare 2 Secondary Register */ -extern volatile unsigned int OC2RS __attribute__((__sfr__)); - -/* OC2R: Output Compare 2 Main Register */ -extern volatile unsigned int OC2R __attribute__((__sfr__)); - -/* OC2CON: Output Compare 2 Control Register */ -extern volatile unsigned int OC2CON __attribute__((__sfr__)); -extern volatile OCxCONBITS OC2CONbits __attribute__((__sfr__)); - - -/* -------------------------------------- */ -/* Motor Control PWM register definitions */ -/* -------------------------------------- */ - -/* PTCON: PWM Timerbase Control Register */ -extern volatile unsigned int PTCON __attribute__((__sfr__)); -typedef struct tagPTCONBITS { - unsigned PTMOD :2; - unsigned PTCKPS :2; - unsigned PTOPS :4; - unsigned :5; - unsigned PTSIDL :1; - unsigned :1; - unsigned PTEN :1; -} PTCONBITS; -extern volatile PTCONBITS PTCONbits __attribute__((__sfr__)); - -/* PTMR: PWM Timebase Count Register */ -extern volatile unsigned int PTMR __attribute__((__sfr__)); -typedef struct tagPTMRBITS { - unsigned PTMR :15; - unsigned PTDIR :1; -} PTMRBITS; -extern volatile PTMRBITS PTMRbits __attribute__((__sfr__)); - -/* PTPER: PWM Timebase Period Register */ -extern volatile unsigned int PTPER __attribute__((__sfr__)); -typedef struct tagPTPERBITS { - unsigned PTPER :15; - unsigned :1; -} PTPERBITS; -extern volatile PTPERBITS PTPERbits __attribute__((__sfr__)); - -/* SEVTCMP: Special Event Compare Count Register */ -extern volatile unsigned int SEVTCMP __attribute__((__sfr__)); -typedef struct tagSEVTCMPBITS { - unsigned SEVTCMP:15; - unsigned SEVTDIR:1; -} SEVTCMPBITS; -extern volatile SEVTCMPBITS SEVTCMPbits __attribute__((__sfr__)); - -/* PWMCON1: PWM Control Register 1 */ -extern volatile unsigned int PWMCON1 __attribute__((__sfr__)); -typedef struct tagPWMCON1BITS { - unsigned PEN1L :1; - unsigned PEN2L :1; - unsigned PEN3L :1; - unsigned :1; - unsigned PEN1H :1; - unsigned PEN2H :1; - unsigned PEN3H :1; - unsigned :1; - unsigned PMOD1 :1; - unsigned PMOD2 :1; - unsigned PMOD3 :1; - unsigned :5; -} PWMCON1BITS; -extern volatile PWMCON1BITS PWMCON1bits __attribute__((__sfr__)); - -/* PWMCON2: PWM Control Register 2 */ -extern volatile unsigned int PWMCON2 __attribute__((__sfr__)); -typedef struct tagPWMCON2BITS { - unsigned UDIS :1; - unsigned OSYNC :1; - unsigned IUE :1; - unsigned :5; - unsigned SEVOPS :4; - unsigned :4; -} PWMCON2BITS; -extern volatile PWMCON2BITS PWMCON2bits __attribute__((__sfr__)); - -/* DTCON1: PWM Dead Time Control Register 1 */ -extern volatile unsigned int DTCON1 __attribute__((__sfr__)); -typedef struct tagDTCON1BITS { - unsigned DTA :6; - unsigned DTAPS :2; - unsigned :8; -} DTCON1BITS; -extern volatile DTCON1BITS DTCON1bits __attribute__((__sfr__)); - -/* FLTACON: PWM Fault Input A Control Register */ -extern volatile unsigned int FLTACON __attribute__((__sfr__)); -typedef struct tagFLTACONBITS { - unsigned FAEN1 :1; - unsigned FAEN2 :1; - unsigned FAEN3 :1; - unsigned :4; - unsigned FLTAM :1; - unsigned FAOV1L :1; - unsigned FAOV1H :1; - unsigned FAOV2L :1; - unsigned FAOV2H :1; - unsigned FAOV3L :1; - unsigned FAOV3H :1; - unsigned :2; -} FLTACONBITS; -extern volatile FLTACONBITS FLTACONbits __attribute__((__sfr__)); - -/* OVDCON: PWM Override Control Register */ -extern volatile unsigned int OVDCON __attribute__((__sfr__)); -typedef struct tagOVDCONBITS { - unsigned POUT1L :1; - unsigned POUT1H :1; - unsigned POUT2L :1; - unsigned POUT2H :1; - unsigned POUT3L :1; - unsigned POUT3H :1; - unsigned :2; - unsigned POVD1L :1; - unsigned POVD1H :1; - unsigned POVD2L :1; - unsigned POVD2H :1; - unsigned POVD3L :1; - unsigned POVD3H :1; - unsigned :2; -} OVDCONBITS; -extern volatile OVDCONBITS OVDCONbits __attribute__((__sfr__)); - -/* PDC1: PWM Duty Cycle Register 1 */ -extern volatile unsigned int PDC1 __attribute__((__sfr__)); - -/* PDC2: PWM Duty Cycle Register 2 */ -extern volatile unsigned int PDC2 __attribute__((__sfr__)); - -/* PDC3: PWM Duty Cycle Register 3 */ -extern volatile unsigned int PDC3 __attribute__((__sfr__)); - - -/* ------------------------ */ -/* I2C register definitions */ -/* ------------------------ */ - -/* I2CRCV: I2C Receive Register */ -extern volatile unsigned char I2CRCV __attribute__((__sfr__)); -typedef struct tagI2CRCVBITS { - unsigned I2CRCV0:1; - unsigned I2CRCV1:1; - unsigned I2CRCV2:1; - unsigned I2CRCV3:1; - unsigned I2CRCV4:1; - unsigned I2CRCV5:1; - unsigned I2CRCV6:1; - unsigned I2CRCV7:1; -} I2CRCVBITS; -extern volatile I2CRCVBITS I2CRCVbits __attribute__((__sfr__)); - -/* I2CTRN: I2C Transmit Register */ -extern volatile unsigned char I2CTRN __attribute__((__sfr__)); -typedef struct tagI2CTRNBITS { - unsigned I2CTRN0:1; - unsigned I2CTRN1:1; - unsigned I2CTRN2:1; - unsigned I2CTRN3:1; - unsigned I2CTRN4:1; - unsigned I2CTRN5:1; - unsigned I2CTRN6:1; - unsigned I2CTRN7:1; -} I2CTRNBITS; -extern volatile I2CTRNBITS I2CTRNbits __attribute__((__sfr__)); - -/* I2CBRG: I2C Baud Rate Generator Register */ -extern volatile unsigned int I2CBRG __attribute__((__sfr__)); -typedef struct tagI2CBRGBITS { - unsigned I2CBRG :9; - unsigned :7; -} I2CBRGBITS; -extern volatile I2CBRGBITS I2CBRGbits __attribute__((__sfr__)); - -/* I2CCON: I2C Control Register */ -extern volatile unsigned int I2CCON __attribute__((__sfr__)); -typedef struct tagI2CCONBITS { - unsigned SEN :1; - unsigned RSEN :1; - unsigned PEN :1; - unsigned RCEN :1; - unsigned ACKEN :1; - unsigned ACKDT :1; - unsigned STREN :1; - unsigned GCEN :1; - unsigned SMEN :1; - unsigned DISSLW :1; - unsigned A10M :1; - unsigned IPMIEN :1; - unsigned SCLREL :1; - unsigned I2CSIDL:1; - unsigned :1; - unsigned I2CEN :1; -} I2CCONBITS; -extern volatile I2CCONBITS I2CCONbits __attribute__((__sfr__)); - -/* I2CSTAT: I2C Status Register */ -extern volatile unsigned int I2CSTAT __attribute__((__sfr__)); -typedef struct tagI2CSTATBITS { - unsigned TBF :1; - unsigned RBF :1; - unsigned R_W :1; - unsigned S :1; - unsigned P :1; - unsigned D_A :1; - unsigned I2COV :1; - unsigned IWCOL :1; - unsigned ADD10 :1; - unsigned GCSTAT :1; - unsigned BCL :1; - unsigned :3; - unsigned TRSTAT :1; - unsigned ACKSTAT:1; -} I2CSTATBITS; -extern volatile I2CSTATBITS I2CSTATbits __attribute__((__sfr__)); - -/* I2CADD: I2C Address Register */ -extern volatile unsigned int I2CADD __attribute__((__sfr__)); -typedef struct tagI2CADDBITS { - unsigned I2CADD :10; - unsigned :6; -} I2CADDBITS; -extern volatile I2CADDBITS I2CADDbits __attribute__((__sfr__)); - - -/* -------------------------- */ -/* UART1 register definitions */ -/* -------------------------- */ - -/* Generic structure of entire SFR area for each UART module */ -typedef struct tagUART { - unsigned int uxmode; - unsigned int uxsta; - unsigned int uxtxreg; - unsigned int uxrxreg; - unsigned int uxbrg; -} UART, *PUART; - -/* SFR blocks for each UART module */ -extern volatile UART UART1 __attribute__((__sfr__)); - -/* Generic structure for UART Mode Registers */ -typedef struct tagUxMODEBITS { - unsigned STSEL :1; - unsigned PDSEL :2; - unsigned :2; - unsigned ABAUD :1; - unsigned LPBACK :1; - unsigned WAKE :1; - unsigned :2; - unsigned ALTIO :1; - unsigned :2; - unsigned USIDL :1; - unsigned :1; - unsigned UARTEN :1; -} UxMODEBITS; - -/* Generic structure for UART Status and Control Registers */ -typedef struct tagUxSTABITS { - unsigned URXDA :1; - unsigned OERR :1; - unsigned FERR :1; - unsigned PERR :1; - unsigned RIDLE :1; - unsigned ADDEN :1; - unsigned URXISEL:2; - unsigned TRMT :1; - unsigned UTXBF :1; - unsigned UTXEN :1; - unsigned UTXBRK :1; - unsigned :3; - unsigned UTXISEL:1; -} UxSTABITS; - -/* Generic structure for UART Transmit Registers */ -typedef struct tagUxTXREGBITS { - unsigned UTXREG0:1; - unsigned UTXREG1:1; - unsigned UTXREG2:1; - unsigned UTXREG3:1; - unsigned UTXREG4:1; - unsigned UTXREG5:1; - unsigned UTXREG6:1; - unsigned UTXREG7:1; - unsigned UTX8 :1; - unsigned :7; -} UxTXREGBITS; - -/* Generic structure for UART Receive Registers */ -typedef struct tagUxRXREGBITS { - unsigned URXREG0:1; - unsigned URXREG1:1; - unsigned URXREG2:1; - unsigned URXREG3:1; - unsigned URXREG4:1; - unsigned URXREG5:1; - unsigned URXREG6:1; - unsigned URXREG7:1; - unsigned URX8 :1; - unsigned :7; -} UxRXREGBITS; - -/* U1MODE: UART1 Mode Regsiter */ -extern volatile unsigned int U1MODE __attribute__((__sfr__)); -extern volatile UxMODEBITS U1MODEbits __attribute__((__sfr__)); - -/* U1STA: UART1 Status and Control Register */ -extern volatile unsigned int U1STA __attribute__((__sfr__)); -extern volatile UxSTABITS U1STAbits __attribute__((__sfr__)); - -/* U1TXREG: UART1 Transmit Register */ -extern volatile unsigned int U1TXREG __attribute__((__sfr__)); -extern volatile UxTXREGBITS U1TXREGbits __attribute__((__sfr__)); - -/* U1RXREG: UART1 Receive Register */ -extern volatile unsigned int U1RXREG __attribute__((__sfr__)); -extern volatile UxRXREGBITS U1RXREGbits __attribute__((__sfr__)); - -/* U1BRG: UART1 Baud Rate Generator Register */ -extern volatile unsigned int U1BRG __attribute__((__sfr__)); - - -/* ------------------------- */ -/* SPI1 register definitions */ -/* ------------------------- */ - -/* Generic structure of entire SFR area for each SPI module */ -typedef struct tagSPI { - unsigned int spixstat; - unsigned int spixcon; - unsigned int spixbuf; -} SPI, *PSPI; - -/* SFR blocks for each SPI module */ -extern volatile SPI SPI1 __attribute__((__sfr__)); - -/* Generic structure for SPI Status Registers */ -typedef struct tagSPIxSTATBITS { - unsigned SPIRBF :1; - unsigned SPITBF :1; - unsigned :4; - unsigned SPIROV :1; - unsigned :6; - unsigned SPISIDL:1; - unsigned :1; - unsigned SPIEN :1; -} SPIxSTATBITS; - -/* Generic structure for SPI Control Registers */ -typedef struct tagSPIxCONBITS { - unsigned PPRE :2; - unsigned SPRE :3; - unsigned MSTEN :1; - unsigned CKP :1; - unsigned SSEN :1; - unsigned CKE :1; - unsigned SMP :1; - unsigned MODE16 :1; - unsigned DISSDO :1; - unsigned :1; - unsigned SPIFSD:1; - unsigned FRMEN :1; - unsigned :1; -} SPIxCONBITS; - -/* SPI1STAT: SPI1 Status Register */ -extern volatile unsigned int SPI1STAT __attribute__((__sfr__)); -extern volatile SPIxSTATBITS SPI1STATbits __attribute__((__sfr__)); - -/* SPI1CON: SPI1 Control Register */ -extern volatile unsigned int SPI1CON __attribute__((__sfr__)); -extern volatile SPIxCONBITS SPI1CONbits __attribute__((__sfr__)); - -/* SPI1BUF: SPI1 Buffer */ -extern volatile unsigned int SPI1BUF __attribute__((__sfr__)); - - -/* ------------------------------------------------------------------ */ -/* 10-bit (500 ksps) Analog-to-Digital Converter register definitions */ -/* ------------------------------------------------------------------ */ - -/* ADC Buffers 0-F */ -extern volatile unsigned int ADCBUF0 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF1 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF2 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF3 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF4 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF5 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF6 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF7 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF8 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUF9 __attribute__((__sfr__)); -extern volatile unsigned int ADCBUFA __attribute__((__sfr__)); -extern volatile unsigned int ADCBUFB __attribute__((__sfr__)); -extern volatile unsigned int ADCBUFC __attribute__((__sfr__)); -extern volatile unsigned int ADCBUFD __attribute__((__sfr__)); -extern volatile unsigned int ADCBUFE __attribute__((__sfr__)); -extern volatile unsigned int ADCBUFF __attribute__((__sfr__)); - -/* ADCON1: ADC Control Register 1 */ -extern volatile unsigned int ADCON1 __attribute__((__sfr__)); -typedef struct tagADCON1BITS { - unsigned DONE :1; - unsigned SAMP :1; - unsigned ASAM :1; - unsigned SIMSAM :1; - unsigned :1; - unsigned SSRC :3; - unsigned FORM :2; - unsigned :3; - unsigned ADSIDL :1; - unsigned :1; - unsigned ADON :1; -} ADCON1BITS; -extern volatile ADCON1BITS ADCON1bits __attribute__((__sfr__)); - -/* ADCON2: ADC Control Register 2 */ -extern volatile unsigned int ADCON2 __attribute__((__sfr__)); -typedef struct tagADCON2BITS { - unsigned ALTS :1; - unsigned BUFM :1; - unsigned SMPI :4; - unsigned :1; - unsigned BUFS :1; - unsigned CHPS :2; - unsigned CSCNA :1; - unsigned :2; - unsigned VCFG :3; -} ADCON2BITS; -extern volatile ADCON2BITS ADCON2bits __attribute__((__sfr__)); - -/* ADCON3: ADC Control Register 3 */ -extern volatile unsigned int ADCON3 __attribute__((__sfr__)); -typedef struct tagADCON3BITS { - unsigned ADCS :6; - unsigned :1; - unsigned ADRC :1; - unsigned SAMC :5; - unsigned :3; -} ADCON3BITS; -extern volatile ADCON3BITS ADCON3bits __attribute__((__sfr__)); - -/* ADCHS: ADC Input Channel Select Register */ -extern volatile unsigned int ADCHS __attribute__((__sfr__)); -typedef struct tagADCHSBITS { - unsigned CH0SA :4; - unsigned CH0NA :1; - unsigned CH123SA:1; - unsigned CH123NA:2; - unsigned CH0SB :4; - unsigned CH0NB :1; - unsigned CH123SB:1; - unsigned CH123NB:2; -} ADCHSBITS; -extern volatile ADCHSBITS ADCHSbits __attribute__((__sfr__)); - -/* ADPCFG: ADC Port Configuration Register */ -extern volatile unsigned int ADPCFG __attribute__((__sfr__)); -typedef struct tagADPCFGBITS { - unsigned PCFG0 :1; - unsigned PCFG1 :1; - unsigned PCFG2 :1; - unsigned PCFG3 :1; - unsigned PCFG4 :1; - unsigned PCFG5 :1; - unsigned :10; -} ADPCFGBITS; -extern volatile ADPCFGBITS ADPCFGbits __attribute__((__sfr__)); - -/* ADCSSL: ADC Input Scan Select Register */ -extern volatile unsigned int ADCSSL __attribute__((__sfr__)); -typedef struct tagADCSSLBITS { - unsigned CSSL0 :1; - unsigned CSSL1 :1; - unsigned CSSL2 :1; - unsigned CSSL3 :1; - unsigned CSSL4 :1; - unsigned CSSL5 :1; - unsigned :10; -} ADCSSLBITS; -extern volatile ADCSSLBITS ADCSSLbits __attribute__((__sfr__)); - - -/* ------------------------------ */ -/* I/O Ports register definitions */ -/* ------------------------------ */ - -/* TRISB: Port B Direction Control Register */ -extern volatile unsigned int TRISB __attribute__((__sfr__)); -typedef struct tagTRISBBITS { - unsigned TRISB0 :1; - unsigned TRISB1 :1; - unsigned TRISB2 :1; - unsigned TRISB3 :1; - unsigned TRISB4 :1; - unsigned TRISB5 :1; - unsigned :10; -} TRISBBITS; -extern volatile TRISBBITS TRISBbits __attribute__((__sfr__)); - -/* PORTB: Port B Pin Register */ -extern volatile unsigned int PORTB __attribute__((__sfr__)); -typedef struct tagPORTBBITS { - unsigned RB0 :1; - unsigned RB1 :1; - unsigned RB2 :1; - unsigned RB3 :1; - unsigned RB4 :1; - unsigned RB5 :1; - unsigned :10; -} PORTBBITS; -extern volatile PORTBBITS PORTBbits __attribute__((__sfr__)); - -/* LATB: Port B Latch Register */ -extern volatile unsigned int LATB __attribute__((__sfr__)); -typedef struct tagLATBBITS { - unsigned LATB0 :1; - unsigned LATB1 :1; - unsigned LATB2 :1; - unsigned LATB3 :1; - unsigned LATB4 :1; - unsigned LATB5 :1; - unsigned :10; -} LATBBITS; -extern volatile LATBBITS LATBbits __attribute__((__sfr__)); - -/* TRISC: Port C Direction Control Register */ -extern volatile unsigned int TRISC __attribute__((__sfr__)); -typedef struct tagTRISCBITS { - unsigned :13; - unsigned TRISC13:1; - unsigned TRISC14:1; - unsigned TRISC15:1; -} TRISCBITS; -extern volatile TRISCBITS TRISCbits __attribute__((__sfr__)); - -/* PORTC: Port C Pin Register */ -extern volatile unsigned int PORTC __attribute__((__sfr__)); -typedef struct tagPORTCBITS { - unsigned :13; - unsigned RC13 :1; - unsigned RC14 :1; - unsigned RC15 :1; -} PORTCBITS; -extern volatile PORTCBITS PORTCbits __attribute__((__sfr__)); - -/* LATC: Port C Latch Register */ -extern volatile unsigned int LATC __attribute__((__sfr__)); -typedef struct tagLATCBITS { - unsigned :13; - unsigned LATC13 :1; - unsigned LATC14 :1; - unsigned LATC15 :1; -} LATCBITS; -extern volatile LATCBITS LATCbits __attribute__((__sfr__)); - -/* TRISD: Port D Direction Control Register */ -extern volatile unsigned int TRISD __attribute__((__sfr__)); -typedef struct tagTRISDBITS { - unsigned TRISD0 :1; - unsigned TRISD1 :1; - unsigned :14; -} TRISDBITS; -extern volatile TRISDBITS TRISDbits __attribute__((__sfr__)); - -/* PORTD: Port D Pin Register */ -extern volatile unsigned int PORTD __attribute__((__sfr__)); -typedef struct tagPORTDBITS { - unsigned RD0 :1; - unsigned RD1 :1; - unsigned :14; -} PORTDBITS; -extern volatile PORTDBITS PORTDbits __attribute__((__sfr__)); - -/* LATD: Port D Latch Register */ -extern volatile unsigned int LATD __attribute__((__sfr__)); -typedef struct tagLATDBITS { - unsigned LATD0 :1; - unsigned LATD1 :1; - unsigned :14; -} LATDBITS; -extern volatile LATDBITS LATDbits __attribute__((__sfr__)); - -/* TRISE: Port E Direction Control Register */ -extern volatile unsigned int TRISE __attribute__((__sfr__)); -typedef struct tagTRISEBITS { - unsigned TRISE0 :1; - unsigned TRISE1 :1; - unsigned TRISE2 :1; - unsigned TRISE3 :1; - unsigned TRISE4 :1; - unsigned TRISE5 :1; - unsigned :2; - unsigned TRISE8 :1; - unsigned :7; -} TRISEBITS; -extern volatile TRISEBITS TRISEbits __attribute__((__sfr__)); - -/* PORTE: Port E Pin Register */ -extern volatile unsigned int PORTE __attribute__((__sfr__)); -typedef struct tagPORTEBITS { - unsigned RE0 :1; - unsigned RE1 :1; - unsigned RE2 :1; - unsigned RE3 :1; - unsigned RE4 :1; - unsigned RE5 :1; - unsigned :2; - unsigned RE8 :1; - unsigned :7; -} PORTEBITS; -extern volatile PORTEBITS PORTEbits __attribute__((__sfr__)); - -/* LATE: Port E Latch Register */ -extern volatile unsigned int LATE __attribute__((__sfr__)); -typedef struct tagLATEBITS { - unsigned LATE0 :1; - unsigned LATE1 :1; - unsigned LATE2 :1; - unsigned LATE3 :1; - unsigned LATE4 :1; - unsigned LATE5 :1; - unsigned :2; - unsigned LATE8 :1; - unsigned :7; -} LATEBITS; -extern volatile LATEBITS LATEbits __attribute__((__sfr__)); - -/* TRISF: Port F Direction Control Register */ -extern volatile unsigned int TRISF __attribute__((__sfr__)); -typedef struct tagTRISFBITS { - unsigned :2; - unsigned TRISF2 :1; - unsigned TRISF3 :1; - unsigned :12; -} TRISFBITS; -extern volatile TRISFBITS TRISFbits __attribute__((__sfr__)); - -/* PORTF: Port F Pin Register */ -extern volatile unsigned int PORTF __attribute__((__sfr__)); -typedef struct tagPORTFBITS { - unsigned :2; - unsigned RF2 :1; - unsigned RF3 :1; - unsigned :12; -} PORTFBITS; -extern volatile PORTFBITS PORTFbits __attribute__((__sfr__)); - -/* LATF: Port F Latch Register */ -extern volatile unsigned int LATF __attribute__((__sfr__)); -typedef struct tagLATFBITS { - unsigned :2; - unsigned LATF2 :1; - unsigned LATF3 :1; - unsigned :12; -} LATFBITS; -extern volatile LATFBITS LATFbits __attribute__((__sfr__)); - - -/* ------------------------- */ -/* CAN1 register definitions */ -/* ------------------------- */ - -/* Generic structure of entire SFR area for each CAN module */ -typedef struct tagCAN { - unsigned int cxrxf0sid; - unsigned int cxrxf0eidh; - unsigned int cxrxf0eidl; - unsigned int reserved0; - unsigned int cxrxf1sid; - unsigned int cxrxf1eidh; - unsigned int cxrxf1eidl; - unsigned int reserved1; - unsigned int cxrxf2sid; - unsigned int cxrxf2eidh; - unsigned int cxrxf2eidl; - unsigned int reserved2; - unsigned int cxrxf3sid; - unsigned int cxrxf3eidh; - unsigned int cxrxf3eidl; - unsigned int reserved3; - unsigned int cxrxf4sid; - unsigned int cxrxf4eidh; - unsigned int cxrxf4eidl; - unsigned int reserved4; - unsigned int cxrxf5sid; - unsigned int cxrxf5eidh; - unsigned int cxrxf5eidl; - unsigned int reserved5; - unsigned int cxrxm0sid; - unsigned int cxrxm0eidh; - unsigned int cxrxm0eidl; - unsigned int reserved6; - unsigned int cxrxm1sid; - unsigned int cxrxm1eidh; - unsigned int cxrxm1eidl; - unsigned int reserved7; - unsigned int cxtx2sid; - unsigned int cxtx2eid; - unsigned int cxtx2dlc; - unsigned int cxtx2b1; - unsigned int cxtx2b2; - unsigned int cxtx2b3; - unsigned int cxtx2b4; - unsigned int cxtx2con; - unsigned int cxtx1sid; - unsigned int cxtx1eid; - unsigned int cxtx1dlc; - unsigned int cxtx1b1; - unsigned int cxtx1b2; - unsigned int cxtx1b3; - unsigned int cxtx1b4; - unsigned int cxtx1con; - unsigned int cxtx0sid; - unsigned int cxtx0eid; - unsigned int cxtx0dlc; - unsigned int cxtx0b1; - unsigned int cxtx0b2; - unsigned int cxtx0b3; - unsigned int cxtx0b4; - unsigned int cxtx0con; - unsigned int cxrx1sid; - unsigned int cxrx1eid; - unsigned int cxrx1dlc; - unsigned int cxrx1b1; - unsigned int cxrx1b2; - unsigned int cxrx1b3; - unsigned int cxrx1b4; - unsigned int cxrx1con; - unsigned int cxrx0sid; - unsigned int cxrx0eid; - unsigned int cxrx0dlc; - unsigned int cxrx0b1; - unsigned int cxrx0b2; - unsigned int cxrx0b3; - unsigned int cxrx0b4; - unsigned int cxrx0con; - unsigned int cxctrl; - unsigned int cxcfg1; - unsigned int cxcfg2; - unsigned int cxintf; - unsigned int cxinte; - unsigned int cxec; - unsigned int reserved8[50]; -} CAN, *PCAN; - -/* SFR blocks for each CAN module */ -extern volatile CAN CAN1 __attribute__((__sfr__)); - -/* Generic structure for CAN Receive Filter Standard Identifier Register */ -typedef struct tagCxRXFxSIDBITS { - unsigned EXIDE :1; - unsigned :1; - unsigned SID :11; - unsigned :3; -} CxRXFxSIDBITS; - -/* C1RXF0SID: CAN1 Receive Filter 0 SID Register */ -extern volatile unsigned int C1RXF0SID __attribute__((__sfr__)); -extern volatile CxRXFxSIDBITS C1RXF0SIDbits __attribute__((__sfr__)); - -/* C1RXF0EIDH: CAN1 Receive Filter 0 EIDH Register */ -extern volatile unsigned int C1RXF0EIDH __attribute__((__sfr__)); - -/* C1RXF0EIDL: CAN1 Receive Filter 0 EIDL Register */ -extern volatile unsigned int C1RXF0EIDL __attribute__((__sfr__)); - -/* C1RXF1SID: CAN1 Receive Filter 1 SID Register */ -extern volatile unsigned int C1RXF1SID __attribute__((__sfr__)); -extern volatile CxRXFxSIDBITS C1RXF1SIDbits __attribute__((__sfr__)); - -/* C1RXF1EIDH: CAN1 Receive Filter 1 EIDH Register */ -extern volatile unsigned int C1RXF1EIDH __attribute__((__sfr__)); - -/* C1RXF1EIDL: CAN1 Receive Filter 1 EIDL Register */ -extern volatile unsigned int C1RXF1EIDL __attribute__((__sfr__)); - -/* C1RXF2SID: CAN1 Receive Filter 2 SID Register */ -extern volatile unsigned int C1RXF2SID __attribute__((__sfr__)); -extern volatile CxRXFxSIDBITS C1RXF2SIDbits __attribute__((__sfr__)); - -/* C1RXF2EIDH: CAN1 Receive Filter 2 EIDH Register */ -extern volatile unsigned int C1RXF2EIDH __attribute__((__sfr__)); - -/* C1RXF2EIDL: CAN1 Receive Filter 2 EIDL Register */ -extern volatile unsigned int C1RXF2EIDL __attribute__((__sfr__)); - -/* C1RXF3SID: CAN1 Receive Filter 3 SID Register */ -extern volatile unsigned int C1RXF3SID __attribute__((__sfr__)); -extern volatile CxRXFxSIDBITS C1RXF3SIDbits __attribute__((__sfr__)); - -/* C1RXF3EIDH: CAN1 Receive Filter 3 EIDH Register */ -extern volatile unsigned int C1RXF3EIDH __attribute__((__sfr__)); - -/* C1RXF3EIDL: CAN1 Receive Filter 3 EIDL Register */ -extern volatile unsigned int C1RXF3EIDL __attribute__((__sfr__)); - -/* C1RXF4SID: CAN1 Receive Filter 4 SID Register */ -extern volatile unsigned int C1RXF4SID __attribute__((__sfr__)); -extern volatile CxRXFxSIDBITS C1RXF4SIDbits __attribute__((__sfr__)); - -/* C1RXF4EIDH: CAN1 Receive Filter 4 EIDH Register */ -extern volatile unsigned int C1RXF4EIDH __attribute__((__sfr__)); - -/* C1RXF4EIDL: CAN1 Receive Filter 4 EIDL Register */ -extern volatile unsigned int C1RXF4EIDL __attribute__((__sfr__)); - -/* C1RXF5SID: CAN1 Receive Filter 5 SID Register */ -extern volatile unsigned int C1RXF5SID __attribute__((__sfr__)); -extern volatile CxRXFxSIDBITS C1RXF5SIDbits __attribute__((__sfr__)); - -/* C1RXF5EIDH: CAN1 Receive Filter 5 EIDH Register */ -extern volatile unsigned int C1RXF5EIDH __attribute__((__sfr__)); - -/* C1RXF5EIDL: CAN1 Receive Filter 5 EIDL Register */ -extern volatile unsigned int C1RXF5EIDL __attribute__((__sfr__)); - -/* Generic structure for CAN Receive Mask Standard Identifier Register */ -typedef struct tagCxRXMxSIDBITS { - unsigned MIDE :1; - unsigned :1; - unsigned SID :11; - unsigned :3; -} CxRXMxSIDBITS; - -/* C1RXM0SID: CAN1 Receive Mask 0 SID Register */ -extern volatile unsigned int C1RXM0SID __attribute__((__sfr__)); -extern volatile CxRXMxSIDBITS C1RXM0SIDbits __attribute__((__sfr__)); - -/* C1RXM0EIDH: CAN1 Receive Mask 0 EIDH Register */ -extern volatile unsigned int C1RXM0EIDH __attribute__((__sfr__)); - -/* C1RXM0EIDL: CAN1 Receive Mask 0 EIDL Register */ -extern volatile unsigned int C1RXM0EIDL __attribute__((__sfr__)); - -/* C1RXM1SID: CAN1 Receive Mask 1 SID Register */ -extern volatile unsigned int C1RXM1SID __attribute__((__sfr__)); -extern volatile CxRXMxSIDBITS C1RXM1SIDbits __attribute__((__sfr__)); - -/* C1RXM1EIDH: CAN1 Receive Mask 1 EIDH Register */ -extern volatile unsigned int C1RXM1EIDH __attribute__((__sfr__)); - -/* C1RXM1EIDL: CAN1 Receive Mask 1 EIDL Register */ -extern volatile unsigned int C1RXM1EIDL __attribute__((__sfr__)); - -/* Generic structure for CAN Transmit Standard Identifier Register */ -typedef struct tagCxTXxSIDBITS { - unsigned TXIDE :1; - unsigned SRR :1; - unsigned SID5_0 :6; - unsigned :3; - unsigned SID10_6:5; -} CxTXxSIDBITS; - -/* Generic structure for CAN Transmit Extended Identifier Register */ -typedef struct tagCxTXxEIDBITS { - unsigned EID13_6:8; - unsigned :4; - unsigned EID17_14:4; -} CxTXxEIDBITS; - -/* Generic structure for CAN Transmit Data Length Code Register */ -typedef struct tagCxTXxDLCBITS { - unsigned :3; - unsigned DLC :4; - unsigned TXRB0 :1; - unsigned TXRB1 :1; - unsigned TXRTR :1; - unsigned EID5_0 :6; -} CxTXxDLCBITS; - -/* Generic structure for CAN Transmit Control Register */ -typedef struct tagCxTXxCONBITS { - unsigned TXPRI :2; - unsigned :1; - unsigned TXREQ :1; - unsigned TXERR :1; - unsigned TXLARB :1; - unsigned TXABT :1; - unsigned :9; -} CxTXxCONBITS; - -/* C1TX2SID: CAN1 Transmit 2 SID Register */ -extern volatile unsigned int C1TX2SID __attribute__((__sfr__)); -extern volatile CxTXxSIDBITS C1TX2SIDbits __attribute__((__sfr__)); - -/* C1TX2EID: CAN1 Transmit 2 EID Register */ -extern volatile unsigned int C1TX2EID __attribute__((__sfr__)); -extern volatile CxTXxEIDBITS C1TX2EIDbits __attribute__((__sfr__)); - -/* C1TX2DLC: CAN1 Transmit 2 DLC Register */ -extern volatile unsigned int C1TX2DLC __attribute__((__sfr__)); -extern volatile CxTXxDLCBITS C1TX2DLCbits __attribute__((__sfr__)); - -/* C1TX2B1: CAN1 Transmit 2 Buffer Word 1 */ -extern volatile unsigned int C1TX2B1 __attribute__((__sfr__)); - -/* C1TX2B2: CAN1 Transmit 2 Buffer Word 2 */ -extern volatile unsigned int C1TX2B2 __attribute__((__sfr__)); - -/* C1TX2B3: CAN1 Transmit 2 Buffer Word 3 */ -extern volatile unsigned int C1TX2B3 __attribute__((__sfr__)); - -/* C1TX2B4: CAN1 Transmit 2 Buffer Word 4 */ -extern volatile unsigned int C1TX2B4 __attribute__((__sfr__)); - -/* C1TX2CON: CAN1 Transmit 2 Control Register */ -extern volatile unsigned int C1TX2CON __attribute__((__sfr__)); -extern volatile CxTXxCONBITS C1TX2CONbits __attribute__((__sfr__)); - -/* C1TX1SID: CAN1 Transmit 1 SID Register */ -extern volatile unsigned int C1TX1SID __attribute__((__sfr__)); -extern volatile CxTXxSIDBITS C1TX1SIDbits __attribute__((__sfr__)); - -/* C1TX1EID: CAN1 Transmit 1 EID Register */ -extern volatile unsigned int C1TX1EID __attribute__((__sfr__)); -extern volatile CxTXxEIDBITS C1TX1EIDbits __attribute__((__sfr__)); - -/* C1TX1DLC: CAN1 Transmit 1 DLC Register */ -extern volatile unsigned int C1TX1DLC __attribute__((__sfr__)); -extern volatile CxTXxDLCBITS C1TX1DLCbits __attribute__((__sfr__)); - -/* C1TX1B1: CAN1 Transmit 1 Buffer Word 1 */ -extern volatile unsigned int C1TX1B1 __attribute__((__sfr__)); - -/* C1TX1B2: CAN1 Transmit 1 Buffer Word 2 */ -extern volatile unsigned int C1TX1B2 __attribute__((__sfr__)); - -/* C1TX1B3: CAN1 Transmit 1 Buffer Word 3 */ -extern volatile unsigned int C1TX1B3 __attribute__((__sfr__)); - -/* C1TX1B4: CAN1 Transmit 1 Buffer Word 4 */ -extern volatile unsigned int C1TX1B4 __attribute__((__sfr__)); - -/* C1TX1CON: CAN1 Transmit 1 Control Register */ -extern volatile unsigned int C1TX1CON __attribute__((__sfr__)); -extern volatile CxTXxCONBITS C1TX1CONbits __attribute__((__sfr__)); - -/* C1TX0SID: CAN1 Transmit 0 SID Register */ -extern volatile unsigned int C1TX0SID __attribute__((__sfr__)); -extern volatile CxTXxSIDBITS C1TX0SIDbits __attribute__((__sfr__)); - -/* C1TX0EID: CAN1 Transmit 0 EID Register */ -extern volatile unsigned int C1TX0EID __attribute__((__sfr__)); -extern volatile CxTXxEIDBITS C1TX0EIDbits __attribute__((__sfr__)); - -/* C1TX0DLC: CAN1 Transmit 0 DLC Register */ -extern volatile unsigned int C1TX0DLC __attribute__((__sfr__)); -extern volatile CxTXxDLCBITS C1TX0DLCbits __attribute__((__sfr__)); - -/* C1TX0B1: CAN1 Transmit 0 Buffer Word 1 */ -extern volatile unsigned int C1TX0B1 __attribute__((__sfr__)); - -/* C1TX0B2: CAN1 Transmit 0 Buffer Word 2 */ -extern volatile unsigned int C1TX0B2 __attribute__((__sfr__)); - -/* C1TX0B3: CAN1 Transmit 0 Buffer Word 3 */ -extern volatile unsigned int C1TX0B3 __attribute__((__sfr__)); - -/* C1TX0B4: CAN1 Transmit 0 Buffer Word 4 */ -extern volatile unsigned int C1TX0B4 __attribute__((__sfr__)); - -/* C1TX0CON: CAN1 Transmit 0 Control Register */ -extern volatile unsigned int C1TX0CON __attribute__((__sfr__)); -extern volatile CxTXxCONBITS C1TX0CONbits __attribute__((__sfr__)); - -/* Generic structure for CAN Receive Standard Identifier Register */ -typedef struct tagCxRXxSIDBITS { - unsigned RXIDE :1; - unsigned SRR :1; - unsigned SID :11; - unsigned :3; -} CxRXxSIDBITS; - -/* Generic structure for CAN Receive Data Length Code Register */ -typedef struct tagCxRXxDLCBITS { - unsigned DLC :4; - unsigned RXRB0 :1; - unsigned :3; - unsigned RXRB1 :1; - unsigned RXRTR :1; - unsigned EID5_0 :6; -} CxRXxDLCBITS; - -/* Generic structure for CAN Receive 1 Control Register */ -typedef struct tagCxRX1CONBITS { - unsigned FILHIT :3; - unsigned RXRTRRO:1; - unsigned :3; - unsigned RXFUL :1; - unsigned :8; -} CxRX1CONBITS; - -/* C1RX1SID: CAN1 Receive 1 SID Register */ -extern volatile unsigned int C1RX1SID __attribute__((__sfr__)); -extern volatile CxRXxSIDBITS C1RX1SIDbits __attribute__((__sfr__)); - -/* C1RX1EID: CAN1 Receive 1 EID Register */ -extern volatile unsigned int C1RX1EID __attribute__((__sfr__)); - -/* C1RX1DLC: CAN1 Receive 1 DLC Register */ -extern volatile unsigned int C1RX1DLC __attribute__((__sfr__)); -extern volatile CxRXxDLCBITS C1RX1DLCbits __attribute__((__sfr__)); - -/* C1RX1B1: CAN1 Receive 1 Buffer Word 1 */ -extern volatile unsigned int C1RX1B1 __attribute__((__sfr__)); - -/* C1RX1B2: CAN1 Receive 1 Buffer Word 2 */ -extern volatile unsigned int C1RX1B2 __attribute__((__sfr__)); - -/* C1RX1B3: CAN1 Receive 1 Buffer Word 3 */ -extern volatile unsigned int C1RX1B3 __attribute__((__sfr__)); - -/* C1RX1B4: CAN1 Receive 1 Buffer Word 4 */ -extern volatile unsigned int C1RX1B4 __attribute__((__sfr__)); - -/* C1RX1CON: CAN1 Receive 1 Control Register */ -extern volatile unsigned int C1RX1CON __attribute__((__sfr__)); -extern volatile CxRX1CONBITS C1RX1CONbits __attribute__((__sfr__)); - -/* Generic structure for CAN Receive 0 Control Register */ -typedef struct tagCxRX0CONBITS { - unsigned FILHIT0:1; - unsigned JTOFF :1; - unsigned DBEN :1; - unsigned RXRTRRO:1; - unsigned :3; - unsigned RXFUL :1; - unsigned :8; -} CxRX0CONBITS; - -/* C1RX0SID: CAN1 Receive 0 SID Register */ -extern volatile unsigned int C1RX0SID __attribute__((__sfr__)); -extern volatile CxRXxSIDBITS C1RX0SIDbits __attribute__((__sfr__)); - -/* C1RX0EID: CAN1 Receive 0 EID Register */ -extern volatile unsigned int C1RX0EID __attribute__((__sfr__)); - -/* C1RX0DLC: CAN1 Receive 0 DLC Register */ -extern volatile unsigned int C1RX0DLC __attribute__((__sfr__)); -extern volatile CxRXxDLCBITS C1RX0DLCbits __attribute__((__sfr__)); - -/* C1RX0B1: CAN1 Receive 0 Buffer Word 1 */ -extern volatile unsigned int C1RX0B1 __attribute__((__sfr__)); - -/* C1RX0B2: CAN1 Receive 0 Buffer Word 2 */ -extern volatile unsigned int C1RX0B2 __attribute__((__sfr__)); - -/* C1RX0B3: CAN1 Receive 0 Buffer Word 3 */ -extern volatile unsigned int C1RX0B3 __attribute__((__sfr__)); - -/* C1RX0B4: CAN1 Receive 0 Buffer Word 4 */ -extern volatile unsigned int C1RX0B4 __attribute__((__sfr__)); - -/* C1RX0CON: CAN1 Receive 0 Control Register */ -extern volatile unsigned int C1RX0CON __attribute__((__sfr__)); -extern volatile CxRX0CONBITS C1RX0CONbits __attribute__((__sfr__)); - -/* C1CTRL: CAN1 Control Register */ -extern volatile unsigned int C1CTRL __attribute__((__sfr__)); -typedef struct tagCxCTRLBITS { - unsigned :1; - unsigned ICODE :3; - unsigned :1; - unsigned OPMODE :3; - unsigned REQOP :3; - unsigned CANCKS :1; - unsigned ABAT :1; - unsigned CSIDL :1; - unsigned :1; - unsigned CANCAP :1; -} CxCTRLBITS; -extern volatile CxCTRLBITS C1CTRLbits __attribute__((__sfr__)); - -/* C1CFG1: CAN1 Baud Rate Control Register 1 */ -extern volatile unsigned int C1CFG1 __attribute__((__sfr__)); -typedef struct tagCxCFG1BITS { - unsigned BRP :6; - unsigned SJW :2; - unsigned :8; -} CxCFG1BITS; -extern volatile CxCFG1BITS C1CFG1bits __attribute__((__sfr__)); - -/* C1CFG2: CAN1 Baud Rate Control Register 2 */ -extern volatile unsigned int C1CFG2 __attribute__((__sfr__)); -typedef struct tagCxCFG2BITS { - unsigned PRSEG :3; - unsigned SEG1PH :3; - unsigned SAM :1; - unsigned SEG2PHTS:1; - unsigned SEG2PH :3; - unsigned :3; - unsigned WAKFIL :1; - unsigned :1; -} CxCFG2BITS; -extern volatile CxCFG2BITS C1CFG2bits __attribute__((__sfr__)); - -/* C1INTF: CAN1 Interrupt Flag Status Register */ -extern volatile unsigned int C1INTF __attribute__((__sfr__)); -typedef struct tagCxINTFBITS { - unsigned RX0IF :1; - unsigned RX1IF :1; - unsigned TX0IF :1; - unsigned TX1IF :1; - unsigned TX2IF :1; - unsigned ERRIF :1; - unsigned WAKIF :1; - unsigned IVRIF :1; - unsigned EWARN :1; - unsigned RXWAR :1; - unsigned TXWAR :1; - unsigned RXEP :1; - unsigned TXEP :1; - unsigned TXBO :1; - unsigned RX1OVR :1; - unsigned RX0OVR :1; -} CxINTFBITS; -extern volatile CxINTFBITS C1INTFbits __attribute__((__sfr__)); - -/* C1INTE: CAN1 Interrupt Enable Control Register */ -extern volatile unsigned int C1INTE __attribute__((__sfr__)); -typedef struct tagCxINTEBITS { - unsigned RX0IE :1; - unsigned RX1IE :1; - unsigned TX0IE :1; - unsigned TX1IE :1; - unsigned TX2IE :1; - unsigned ERRIE :1; - unsigned WAKIE :1; - unsigned IVRIE :1; - unsigned :8; -} CxINTEBITS; -extern volatile CxINTEBITS C1INTEbits __attribute__((__sfr__)); - -/* C1EC: CAN1 Error Count Register */ -extern volatile unsigned int C1EC __attribute__((__sfr__)); - -/* C1RERRCNT: CAN1 Receive Error Count (C1EC low byte) */ -extern volatile unsigned char C1RERRCNT __attribute__((__sfr__)); - -/* C1TERRCNT: CAN1 Transmit Error Count (C1EC high byte) */ -extern volatile unsigned char C1TERRCNT __attribute__((__sfr__)); - - -/* --------------------------------------- */ -/* System Integration register definitions */ -/* --------------------------------------- */ - -/* RCON: Reset Control Register */ -extern volatile unsigned int RCON __attribute__((__sfr__)); -typedef struct tagRCONBITS { - unsigned POR :1; - unsigned BOR :1; - unsigned IDLE :1; - unsigned SLEEP :1; - unsigned WDTO :1; - unsigned SWDTEN :1; - unsigned SWR :1; - unsigned EXTR :1; - unsigned :5; - unsigned BGST :1; - unsigned IOPUWR :1; - unsigned TRAPR :1; -} RCONBITS; -extern volatile RCONBITS RCONbits __attribute__((__sfr__)); - -/* OSCCON: Oscillator Control Register */ -extern volatile unsigned int OSCCON __attribute__((__sfr__)); -typedef struct tagOSCCONBITS { - unsigned OSWEN :1; - unsigned LPOSCEN:1; - unsigned :1; - unsigned CF :1; - unsigned :1; - unsigned LOCK :1; - unsigned POST :2; - unsigned NOSC :2; - unsigned TUN0 :1; - unsigned TUN1 :1; - unsigned COSC :2; - unsigned TUN2 :1; - unsigned TUN3 :1; -} OSCCONBITS; -extern volatile OSCCONBITS OSCCONbits __attribute__((__sfr__)); - - -/* ---------------------------------------- */ -/* Non-Volatile Memory register definitions */ -/* ---------------------------------------- */ - -/* NVMCON: Non-Volatile Memory Control Register */ -extern volatile unsigned int NVMCON __attribute__((__sfr__)); -typedef struct tagNVMCONBITS { - unsigned PROGOP :7; - unsigned :1; - unsigned TWRI :1; - unsigned :4; - unsigned WRERR :1; - unsigned WREN :1; - unsigned WR :1; -} NVMCONBITS; -extern volatile NVMCONBITS NVMCONbits __attribute__((__sfr__)); - -/* NVM Address bits <15:0> */ -extern volatile unsigned int NVMADR __attribute__((__sfr__)); - -/* NVM Address bits <23:16> */ -extern volatile unsigned char NVMADRU __attribute__((__sfr__)); - -/* NVM Key */ -extern volatile unsigned char NVMKEY __attribute__((__sfr__)); - - -/* ---------------------------------------------- */ -/* Peripheral Module Disable register definitions */ -/* ---------------------------------------------- */ - -/* PMD1: Peripheral Module Disable Register 1 */ -extern volatile unsigned int PMD1 __attribute__((__sfr__)); -typedef struct tagPMD1BITS { - unsigned ADCMD :1; - unsigned C1MD :1; - unsigned :1; - unsigned SPI1MD :1; - unsigned :1; - unsigned U1MD :1; - unsigned :1; - unsigned I2CMD :1; - unsigned :1; - unsigned PWMMD :1; - unsigned QEIMD :1; - unsigned T1MD :1; - unsigned T2MD :1; - unsigned T3MD :1; - unsigned T4MD :1; - unsigned T5MD :1; -} PMD1BITS; -extern volatile PMD1BITS PMD1bits __attribute__((__sfr__)); - -/* PMD2: Peripheral Module Disable Register 3 */ -extern volatile unsigned int PMD2 __attribute__((__sfr__)); -typedef struct tagPMD2BITS { - unsigned OC1MD :1; - unsigned OC2MD :1; - unsigned :6; - unsigned IC1MD :1; - unsigned IC2MD :1; - unsigned :4; - unsigned IC7MD :1; - unsigned IC8MD :1; -} PMD2BITS; -extern volatile PMD2BITS PMD2bits __attribute__((__sfr__)); - - -/* -------------------------------------------- */ -/* Defines for unique SFR bit names */ -/* -------------------------------------------- */ - -/* SR */ -#define _C SRbits.C -#define _Z SRbits.Z -#define _OV SRbits.OV -#define _N SRbits.N -#define _RA SRbits.RA -#define _IPL SRbits.IPL -#define _DC SRbits.DC -#define _DA SRbits.DA -#define _SAB SRbits.SAB -#define _OAB SRbits.OAB -#define _SB SRbits.SB -#define _SA SRbits.SA -#define _OB SRbits.OB -#define _OA SRbits.OA - -/* CORCON */ -#define _IF CORCONbits.IF -#define _RND CORCONbits.RND -#define _PSV CORCONbits.PSV -#define _IPL3 CORCONbits.IPL3 -#define _ACCSAT CORCONbits.ACCSAT -#define _SATDW CORCONbits.SATDW -#define _SATB CORCONbits.SATB -#define _SATA CORCONbits.SATA -#define _DL CORCONbits.DL -#define _EDT CORCONbits.EDT -#define _US CORCONbits.US - -/* MODCON */ -#define _XWM MODCONbits.XWM -#define _YWM MODCONbits.YWM -#define _BWM MODCONbits.BWM -#define _YMODEN MODCONbits.YMODEN -#define _XMODEN MODCONbits.XMODEN - -/* XBREV */ -#define _XB XBREVbits.XB -#define _BREN XBREVbits.BREN - -/* INTCON1 */ -#define _OSCFAIL INTCON1bits.OSCFAIL -#define _STKERR INTCON1bits.STKERR -#define _ADDRERR INTCON1bits.ADDRERR -#define _MATHERR INTCON1bits.MATHERR -#define _COVTE INTCON1bits.COVTE -#define _OVBTE INTCON1bits.OVBTE -#define _OVATE INTCON1bits.OVATE -#define _NSTDIS INTCON1bits.NSTDIS - -/* INTCON2 */ -#define _INT0EP INTCON2bits.INT0EP -#define _INT1EP INTCON2bits.INT1EP -#define _INT2EP INTCON2bits.INT2EP -#define _DISI INTCON2bits.DISI -#define _ALTIVT INTCON2bits.ALTIVT - -/* IFS0 */ -#define _INT0IF IFS0bits.INT0IF -#define _IC1IF IFS0bits.IC1IF -#define _OC1IF IFS0bits.OC1IF -#define _T1IF IFS0bits.T1IF -#define _IC2IF IFS0bits.IC2IF -#define _OC2IF IFS0bits.OC2IF -#define _T2IF IFS0bits.T2IF -#define _T3IF IFS0bits.T3IF -#define _SPI1IF IFS0bits.SPI1IF -#define _U1RXIF IFS0bits.U1RXIF -#define _U1TXIF IFS0bits.U1TXIF -#define _ADIF IFS0bits.ADIF -#define _NVMIF IFS0bits.NVMIF -#define _SI2CIF IFS0bits.SI2CIF -#define _MI2CIF IFS0bits.MI2CIF -#define _CNIF IFS0bits.CNIF - -/* IFS1 */ -#define _INT1IF IFS1bits.INT1IF -#define _IC7IF IFS1bits.IC7IF -#define _IC8IF IFS1bits.IC8IF -#define _T4IF IFS1bits.T4IF -#define _T5IF IFS1bits.T5IF -#define _INT2IF IFS1bits.INT2IF -#define _C1IF IFS1bits.C1IF - -/* IFS2 */ -#define _PWMIF IFS2bits.PWMIF -#define _QEIIF IFS2bits.QEIIF -#define _FLTAIF IFS2bits.FLTAIF - -/* IEC0 */ -#define _INT0IE IEC0bits.INT0IE -#define _IC1IE IEC0bits.IC1IE -#define _OC1IE IEC0bits.OC1IE -#define _T1IE IEC0bits.T1IE -#define _IC2IE IEC0bits.IC2IE -#define _OC2IE IEC0bits.OC2IE -#define _T2IE IEC0bits.T2IE -#define _T3IE IEC0bits.T3IE -#define _SPI1IE IEC0bits.SPI1IE -#define _U1RXIE IEC0bits.U1RXIE -#define _U1TXIE IEC0bits.U1TXIE -#define _ADIE IEC0bits.ADIE -#define _NVMIE IEC0bits.NVMIE -#define _SI2CIE IEC0bits.SI2CIE -#define _MI2CIE IEC0bits.MI2CIE -#define _CNIE IEC0bits.CNIE - -/* IEC1 */ -#define _INT1IE IEC1bits.INT1IE -#define _IC7IE IEC1bits.IC7IE -#define _IC8IE IEC1bits.IC8IE -#define _T4IE IEC1bits.T4IE -#define _T5IE IEC1bits.T5IE -#define _INT2IE IEC1bits.INT2IE -#define _C1IE IEC1bits.C1IE - -/* IEC2 */ -#define _PWMIE IEC2bits.PWMIE -#define _QEIIE IEC2bits.QEIIE -#define _FLTAIE IEC2bits.FLTAIE - -/* IPC0 */ -#define _INT0IP IPC0bits.INT0IP -#define _IC1IP IPC0bits.IC1IP -#define _OC1IP IPC0bits.OC1IP -#define _T1IP IPC0bits.T1IP - -/* IPC1 */ -#define _IC2IP IPC1bits.IC2IP -#define _OC2IP IPC1bits.OC2IP -#define _T2IP IPC1bits.T2IP -#define _T3IP IPC1bits.T3IP - -/* IPC2 */ -#define _SPI1IP IPC2bits.SPI1IP -#define _U1RXIP IPC2bits.U1RXIP -#define _U1TXIP IPC2bits.U1TXIP -#define _ADIP IPC2bits.ADIP - -/* IPC3 */ -#define _NVMIP IPC3bits.NVMIP -#define _SI2CIP IPC3bits.SI2CIP -#define _MI2CIP IPC3bits.MI2CIP -#define _CNIP IPC3bits.CNIP - -/* IPC4 */ -#define _INT1IP IPC4bits.INT1IP -#define _IC7IP IPC4bits.IC7IP -#define _IC8IP IPC4bits.IC8IP - -/* IPC5 */ -#define _T4IP IPC5bits.T4IP -#define _T5IP IPC5bits.T5IP -#define _INT2IP IPC5bits.INT2IP - -/* IPC6 */ -#define _C1IP IPC6bits.C1IP - -/* IPC9 */ -#define _PWMIP IPC9bits.PWMIP - -/* IPC10 */ -#define _QEIIP IPC10bits.QEIIP -#define _FLTAIP IPC10bits.FLTAIP - -/* CNEN1 */ -#define _CN0IE CNEN1bits.CN0IE -#define _CN1IE CNEN1bits.CN1IE -#define _CN2IE CNEN1bits.CN2IE -#define _CN3IE CNEN1bits.CN3IE -#define _CN4IE CNEN1bits.CN4IE -#define _CN5IE CNEN1bits.CN5IE -#define _CN6IE CNEN1bits.CN6IE -#define _CN7IE CNEN1bits.CN7IE - -/* CNPU1 */ -#define _CN0PUE CNPU1bits.CN0PUE -#define _CN1PUE CNPU1bits.CN1PUE -#define _CN2PUE CNPU1bits.CN2PUE -#define _CN3PUE CNPU1bits.CN3PUE -#define _CN4PUE CNPU1bits.CN4PUE -#define _CN5PUE CNPU1bits.CN5PUE -#define _CN6PUE CNPU1bits.CN6PUE -#define _CN7PUE CNPU1bits.CN7PUE - -/* QEICON */ -#define _UPDN_SRC QEICONbits.UPDN_SRC -#define _TQCS QEICONbits.TQCS -#define _POSRES QEICONbits.POSRES -#define _TQCKPS QEICONbits.TQCKPS -#define _TQGATE QEICONbits.TQGATE -#define _PCDOUT QEICONbits.PCDOUT -#define _SWPAB QEICONbits.SWPAB -#define _QEIM QEICONbits.QEIM -#define _UPDN QEICONbits.UPDN -#define _INDX QEICONbits.INDX -#define _QEISIDL QEICONbits.QEISIDL -#define _CNTERR QEICONbits.CNTERR - -/* DFLTCON */ -#define _QECK DFLTCONbits.QECK -#define _QEOUT DFLTCONbits.QEOUT -#define _CEID DFLTCONbits.CEID -#define _IMV DFLTCONbits.IMV - -/* PTCON */ -#define _PTMOD PTCONbits.PTMOD -#define _PTCKPS PTCONbits.PTCKPS -#define _PTOPS PTCONbits.PTOPS -#define _PTSIDL PTCONbits.PTSIDL -#define _PTEN PTCONbits.PTEN - -/* PTMR */ -#define _PTDIR PTMRbits.PTDIR - -/* SEVTCMP */ -#define _SEVTDIR SEVTCMPbits.SEVTDIR - -/* PWMCON1 */ -#define _PEN1L PWMCON1bits.PEN1L -#define _PEN2L PWMCON1bits.PEN2L -#define _PEN3L PWMCON1bits.PEN3L -#define _PEN1H PWMCON1bits.PEN1H -#define _PEN2H PWMCON1bits.PEN2H -#define _PEN3H PWMCON1bits.PEN3H -#define _PMOD1 PWMCON1bits.PMOD1 -#define _PMOD2 PWMCON1bits.PMOD2 -#define _PMOD3 PWMCON1bits.PMOD3 - -/* PWMCON2 */ -#define _UDIS PWMCON2bits.UDIS -#define _OSYNC PWMCON2bits.OSYNC -#define _SEVOPS PWMCON2bits.SEVOPS - -/* DTCON1 */ -#define _DTA DTCON1bits.DTA -#define _DTAPS DTCON1bits.DTAPS - -/* FLTACON */ -#define _FAEN1 FLTACONbits.FAEN1 -#define _FAEN2 FLTACONbits.FAEN2 -#define _FAEN3 FLTACONbits.FAEN3 -#define _FLTAM FLTACONbits.FLTAM -#define _FAOV1L FLTACONbits.FAOV1L -#define _FAOV1H FLTACONbits.FAOV1H -#define _FAOV2L FLTACONbits.FAOV2L -#define _FAOV2H FLTACONbits.FAOV2H -#define _FAOV3L FLTACONbits.FAOV3L -#define _FAOV3H FLTACONbits.FAOV3H - -/* FLTBCON */ -#define _FBEN1 FLTBCONbits.FBEN1 -#define _FBEN2 FLTBCONbits.FBEN2 -#define _FBEN3 FLTBCONbits.FBEN3 -#define _FLTBM FLTBCONbits.FLTBM -#define _FBOV1L FLTBCONbits.FBOV1L -#define _FBOV1H FLTBCONbits.FBOV1H -#define _FBOV2L FLTBCONbits.FBOV2L -#define _FBOV2H FLTBCONbits.FBOV2H -#define _FBOV3L FLTBCONbits.FBOV3L -#define _FBOV3H FLTBCONbits.FBOV3H - -/* OVDCON */ -#define _POUT1L OVDCONbits.POUT1L -#define _POUT1H OVDCONbits.POUT1H -#define _POUT2L OVDCONbits.POUT2L -#define _POUT2H OVDCONbits.POUT2H -#define _POUT3L OVDCONbits.POUT3L -#define _POUT3H OVDCONbits.POUT3H -#define _POVD1L OVDCONbits.POVD1L -#define _POVD1H OVDCONbits.POVD1H -#define _POVD2L OVDCONbits.POVD2L -#define _POVD2H OVDCONbits.POVD2H -#define _POVD3L OVDCONbits.POVD3L -#define _POVD3H OVDCONbits.POVD3H - -/* I2CCON */ -#define _SEN I2CCONbits.SEN -#define _RSEN I2CCONbits.RSEN -#define _PEN I2CCONbits.PEN -#define _RCEN I2CCONbits.RCEN -#define _ACKEN I2CCONbits.ACKEN -#define _ACKDT I2CCONbits.ACKDT -#define _STREN I2CCONbits.STREN -#define _GCEN I2CCONbits.GCEN -#define _SMEN I2CCONbits.SMEN -#define _DISSLW I2CCONbits.DISSLW -#define _A10M I2CCONbits.A10M -#define _IPMIEN I2CCONbits.IPMIEN -#define _SCLREL I2CCONbits.SCLREL -#define _I2CSIDL I2CCONbits.I2CSIDL -#define _I2CEN I2CCONbits.I2CEN - -/* I2CSTAT */ -#define _TBF I2CSTATbits.TBF -#define _RBF I2CSTATbits.RBF -#define _R_W I2CSTATbits.R_W -#define _S I2CSTATbits.S -#define _P I2CSTATbits.P -#define _D_A I2CSTATbits.D_A -#define _I2COV I2CSTATbits.I2COV -#define _IWCOL I2CSTATbits.IWCOL -#define _ADD10 I2CSTATbits.ADD10 -#define _GCSTAT I2CSTATbits.GCSTAT -#define _BCL I2CSTATbits.BCL -#define _TRSTAT I2CSTATbits.TRSTAT -#define _ACKSTAT I2CSTATbits.ACKSTAT - -/* ADCON1 */ -#define _DONE ADCON1bits.DONE -#define _SAMP ADCON1bits.SAMP -#define _ASAM ADCON1bits.ASAM -#define _SIMSAM ADCON1bits.SIMSAM -#define _SSRC ADCON1bits.SSRC -#define _FORM ADCON1bits.FORM -#define _ADSIDL ADCON1bits.ADSIDL -#define _ADON ADCON1bits.ADON - -/* ADCON2 */ -#define _ALTS ADCON2bits.ALTS -#define _BUFM ADCON2bits.BUFM -#define _SMPI ADCON2bits.SMPI -#define _BUFS ADCON2bits.BUFS -#define _CSCNA ADCON2bits.CSCNA -#define _VCFG ADCON2bits.VCFG - -/* ADCON3 */ -#define _ADCS ADCON3bits.ADCS -#define _ADRC ADCON3bits.ADRC -#define _SAMC ADCON3bits.SAMC - -/* ADCHS */ -#define _CH0SA ADCHSbits.CH0SA -#define _CH0NA ADCHSbits.CH0NA -#define _CH123SA ADCHSbits.CH123SA -#define _CH123NA ADCHSbits.CH123NA -#define _CH0SB ADCHSbits.CH0SB -#define _CH0NB ADCHSbits.CH0NB -#define _CH123SB ADCHSbits.CH123SB -#define _CH123NB ADCHSbits.CH123NB - -/* ADPCFG */ -#define _PCFG0 ADPCFGbits.PCFG0 -#define _PCFG1 ADPCFGbits.PCFG1 -#define _PCFG2 ADPCFGbits.PCFG2 -#define _PCFG3 ADPCFGbits.PCFG3 -#define _PCFG4 ADPCFGbits.PCFG4 -#define _PCFG5 ADPCFGbits.PCFG5 - -/* ADCSSL */ -#define _CSSL0 ADCSSLbits.CSSL0 -#define _CSSL1 ADCSSLbits.CSSL1 -#define _CSSL2 ADCSSLbits.CSSL2 -#define _CSSL3 ADCSSLbits.CSSL3 -#define _CSSL4 ADCSSLbits.CSSL4 -#define _CSSL5 ADCSSLbits.CSSL5 - -/* TRISB */ -#define _TRISB0 TRISBbits.TRISB0 -#define _TRISB1 TRISBbits.TRISB1 -#define _TRISB2 TRISBbits.TRISB2 -#define _TRISB3 TRISBbits.TRISB3 -#define _TRISB4 TRISBbits.TRISB4 -#define _TRISB5 TRISBbits.TRISB5 - -/* PORTB */ -#define _RB0 PORTBbits.RB0 -#define _RB1 PORTBbits.RB1 -#define _RB2 PORTBbits.RB2 -#define _RB3 PORTBbits.RB3 -#define _RB4 PORTBbits.RB4 -#define _RB5 PORTBbits.RB5 - -/* LATB */ -#define _LATB0 LATBbits.LATB0 -#define _LATB1 LATBbits.LATB1 -#define _LATB2 LATBbits.LATB2 -#define _LATB3 LATBbits.LATB3 -#define _LATB4 LATBbits.LATB4 -#define _LATB5 LATBbits.LATB5 - -/* TRISC */ -#define _TRISC13 TRISCbits.TRISC13 -#define _TRISC14 TRISCbits.TRISC14 -#define _TRISC15 TRISCbits.TRISC15 - -/* PORTC */ -#define _RC13 PORTCbits.RC13 -#define _RC14 PORTCbits.RC14 -#define _RC15 PORTCbits.RC15 - -/* LATC */ -#define _LATC13 LATCbits.LATC13 -#define _LATC14 LATCbits.LATC14 -#define _LATC15 LATCbits.LATC15 - -/* TRISD */ -#define _TRISD0 TRISDbits.TRISD0 -#define _TRISD1 TRISDbits.TRISD1 - -/* PORTD */ -#define _RD0 PORTDbits.RD0 -#define _RD1 PORTDbits.RD1 - -/* LATD */ -#define _LATD0 LATDbits.LATD0 -#define _LATD1 LATDbits.LATD1 - -/* TRISE */ -#define _TRISE0 TRISEbits.TRISE0 -#define _TRISE1 TRISEbits.TRISE1 -#define _TRISE2 TRISEbits.TRISE2 -#define _TRISE3 TRISEbits.TRISE3 -#define _TRISE4 TRISEbits.TRISE4 -#define _TRISE5 TRISEbits.TRISE5 -#define _TRISE8 TRISEbits.TRISE8 - -/* PORTE */ -#define _RE0 PORTEbits.RE0 -#define _RE1 PORTEbits.RE1 -#define _RE2 PORTEbits.RE2 -#define _RE3 PORTEbits.RE3 -#define _RE4 PORTEbits.RE4 -#define _RE5 PORTEbits.RE5 -#define _RE8 PORTEbits.RE8 - -/* LATE */ -#define _LATE0 LATEbits.LATE0 -#define _LATE1 LATEbits.LATE1 -#define _LATE2 LATEbits.LATE2 -#define _LATE3 LATEbits.LATE3 -#define _LATE4 LATEbits.LATE4 -#define _LATE5 LATEbits.LATE5 -#define _LATE8 LATEbits.LATE8 - -/* TRISF */ -#define _TRISF2 TRISFbits.TRISF2 -#define _TRISF3 TRISFbits.TRISF3 - -/* PORTF */ -#define _RF2 PORTFbits.RF2 -#define _RF3 PORTFbits.RF3 - -/* LATF */ -#define _LATF2 LATFbits.LATF2 -#define _LATF3 LATFbits.LATF3 - -/* RCON */ -#define _POR RCONbits.POR -#define _BOR RCONbits.BOR -#define _IDLE RCONbits.IDLE -#define _SLEEP RCONbits.SLEEP -#define _WDTO RCONbits.WDTO -#define _SWDTEN RCONbits.SWDTEN -#define _SWR RCONbits.SWR -#define _EXTR RCONbits.EXTR -#define _BGST RCONbits.BGST -#define _IOPUWR RCONbits.IOPUWR -#define _TRAPR RCONbits.TRAPR - -/* OSCCON */ -#define _OSWEN OSCCONbits.OSWEN -#define _LPOSCEN OSCCONbits.LPOSCEN -#define _CF OSCCONbits.CF -#define _LOCK OSCCONbits.LOCK -#define _POST OSCCONbits.POST -#define _NOSC OSCCONbits.NOSC -#define _TUN0 OSCCONbits.TUN0 -#define _TUN1 OSCCONbits.TUN1 -#define _COSC OSCCONbits.COSC -#define _TUN2 OSCCONbits.TUN2 -#define _TUN3 OSCCONbits.TUN3 - -/* NVMCON */ -#define _PROGOP NVMCONbits.PROGOP -#define _TWRI NVMCONbits.TWRI -#define _WRERR NVMCONbits.WRERR -#define _WREN NVMCONbits.WREN -#define _WR NVMCONbits.WR - -/* PMD1 */ -#define _ADCMD PMD1bits.ADCMD -#define _C1MD PMD1bits.C1MD -#define _SPI1MD PMD1bits.SPI1MD -#define _U1MD PMD1bits.U1MD -#define _I2CMD PMD1bits.I2CMD -#define _PWMMD PMD1bits.PWMMD -#define _QEIMD PMD1bits.QEIMD -#define _T1MD PMD1bits.T1MD -#define _T2MD PMD1bits.T2MD -#define _T3MD PMD1bits.T3MD -#define _T4MD PMD1bits.T4MD -#define _T5MD PMD1bits.T5MD - -/* PMD2 */ -#define _OC1MD PMD2bits.OC1MD -#define _OC2MD PMD2bits.OC2MD -#define _IC1MD PMD2bits.IC1MD -#define _IC2MD PMD2bits.IC2MD -#define _IC7MD PMD2bits.IC7MD -#define _IC8MD PMD2bits.IC8MD - - -/* -------------------------------------------- */ -/* Macros for Device Configuration Registers */ -/* -------------------------------------------- */ - -/* FOSC */ -#define _FOSC(x) __attribute__((section("__FOSC.sec,code"))) int _FOSC = (x); - -#define CSW_FSCM_OFF 0xFFFF -#define CSW_ON_FSCM_OFF 0x7FFF -#define CSW_FSCM_ON 0x3FFF -#define EC 0xFFFB -#define ECIO 0xFFFC -#define EC_PLL4 0xFFFD -#define EC_PLL8 0xFFFE -#define EC_PLL16 0xFFFF -#define ERC 0xFFF9 -#define ERCIO 0xFFF8 -#define XT 0xFFF4 -#define XT_PLL4 0xFFF5 -#define XT_PLL8 0xFFF6 -#define XT_PLL16 0xFFF7 -#define XTL 0xFFF0 -#define FRC_PLL4 0xFFF1 -#define FRC_PLL8 0xFFFA -#define FRC_PLL16 0xFFF3 -#define HS 0xFFF2 -#define LP 0xFCFF -#define FRC 0xFDFF -#define LPRC 0xFEFF - -/* FWDT */ -#define _FWDT(x) __attribute__((section("__FWDT.sec,code"))) int _FWDT = (x); - -#define WDT_ON 0xFFFF -#define WDT_OFF 0x7FFF -#define WDTPSA_1 0xFFCF -#define WDTPSA_8 0xFFDF -#define WDTPSA_64 0xFFEF -#define WDTPSA_512 0xFFFF -#define WDTPSB_1 0xFFF0 -#define WDTPSB_2 0xFFF1 -#define WDTPSB_3 0xFFF2 -#define WDTPSB_4 0xFFF3 -#define WDTPSB_5 0xFFF4 -#define WDTPSB_6 0xFFF5 -#define WDTPSB_7 0xFFF6 -#define WDTPSB_8 0xFFF7 -#define WDTPSB_9 0xFFF8 -#define WDTPSB_10 0xFFF9 -#define WDTPSB_11 0xFFFA -#define WDTPSB_12 0xFFFB -#define WDTPSB_13 0xFFFC -#define WDTPSB_14 0xFFFD -#define WDTPSB_15 0xFFFE -#define WDTPSB_16 0xFFFF - -/* FBORPOR */ -#define _FBORPOR(x) __attribute__((section("__FBORPOR.sec,code"))) int _FBORPOR = (x); - -#define MCLR_EN 0xFFFF -#define MCLR_DIS 0x7FFF -#define RST_IOPIN 0xFFFF -#define RST_PWMPIN 0xFBFF -#define PWMxH_ACT_HI 0xFFFF -#define PWMxH_ACT_LO 0xFDFF -#define PWMxL_ACT_HI 0xFFFF -#define PWMxL_ACT_LO 0xFEFF -#define PBOR_ON 0xFFFF -#define PBOR_OFF 0xFF7F -#define BORV_20 0xFFFF -#define BORV_27 0xFFEF -#define BORV_42 0xFFDF -#define BORV_45 0xFFCF -#define PWRT_OFF 0xFFFC -#define PWRT_4 0xFFFD -#define PWRT_16 0xFFFE -#define PWRT_64 0xFFFF - -/* FGS */ -#define _FGS(x) __attribute__((section("__FGS.sec,code"))) int _FGS = (x); - -#define CODE_PROT_OFF 0xFFFF -#define CODE_PROT_ON 0xFFFD - - -/* --------------------------------------------------------------------------- - Setting configuration fuses using macros: - ========================================== - Macros are provided which can be used to set configuration fuses: - For e.g., to set the FOSC fuse using a macro above, the following line of - code can be pasted before the beginning of the C source code. - - _FOSC(CSW_FSCM_ON & EC_PLL16); - - This would enable the external clock with the PLL set to 16x and further, - enable clock switching and failsafe clock monitoring. - - Similarly, to set the FBORPOR fuse, paste the following : - - _FBORPOR(PBOR_ON & BORV_27 & PWRT_ON_64 & MCLR_DIS); - - This would enable Brown-out Reset at 2.7 Volts and initialize the Power-up - timer to 64 milliseconds and configure the use of the MCLR pin for I/O. - Given below, is a complete list of settings valid to each of the fuses: - (Paste the ones relevant to your application before the beginning of C - source code.) - - FOSC: - ====== - _FOSC(CSW_FSCM_OFF & EC); - _FOSC(CSW_FSCM_OFF & ECIO); - _FOSC(CSW_FSCM_OFF & EC_PLL4); - _FOSC(CSW_FSCM_OFF & EC_PLL8); - _FOSC(CSW_FSCM_OFF & EC_PLL16); - _FOSC(CSW_FSCM_OFF & ERC); - _FOSC(CSW_FSCM_OFF & ERCIO); - _FOSC(CSW_FSCM_OFF & XT); - _FOSC(CSW_FSCM_OFF & XT_PLL4); - _FOSC(CSW_FSCM_OFF & XT_PLL8); - _FOSC(CSW_FSCM_OFF & XT_PLL16); - _FOSC(CSW_FSCM_OFF & XTL); - _FOSC(CSW_FSCM_OFF & FRC_PLL4); - _FOSC(CSW_FSCM_OFF & FRC_PLL8); - _FOSC(CSW_FSCM_OFF & FRC_PLL16); - _FOSC(CSW_FSCM_OFF & HS); - _FOSC(CSW_FSCM_OFF & LP & EC); - _FOSC(CSW_FSCM_OFF & LP & ECIO); - _FOSC(CSW_FSCM_OFF & LP & EC_PLL4); - _FOSC(CSW_FSCM_OFF & LP & EC_PLL8); - _FOSC(CSW_FSCM_OFF & LP & EC_PLL16); - _FOSC(CSW_FSCM_OFF & LP & ERC); - _FOSC(CSW_FSCM_OFF & LP & ERCIO); - _FOSC(CSW_FSCM_OFF & LP & XT); - _FOSC(CSW_FSCM_OFF & LP & XT_PLL4); - _FOSC(CSW_FSCM_OFF & LP & XT_PLL8); - _FOSC(CSW_FSCM_OFF & LP & XT_PLL16); - _FOSC(CSW_FSCM_OFF & LP & XTL); - _FOSC(CSW_FSCM_OFF & LP & FRC_PLL4); - _FOSC(CSW_FSCM_OFF & LP & FRC_PLL8); - _FOSC(CSW_FSCM_OFF & LP & FRC_PLL16); - _FOSC(CSW_FSCM_OFF & LP & HS); - _FOSC(CSW_FSCM_OFF & FRC & EC); - _FOSC(CSW_FSCM_OFF & FRC & ECIO); - _FOSC(CSW_FSCM_OFF & FRC & EC_PLL4); - _FOSC(CSW_FSCM_OFF & FRC & EC_PLL8); - _FOSC(CSW_FSCM_OFF & FRC & EC_PLL16); - _FOSC(CSW_FSCM_OFF & FRC & ERC); - _FOSC(CSW_FSCM_OFF & FRC & ERCIO); - _FOSC(CSW_FSCM_OFF & FRC & XT); - _FOSC(CSW_FSCM_OFF & FRC & XT_PLL4); - _FOSC(CSW_FSCM_OFF & FRC & XT_PLL8); - _FOSC(CSW_FSCM_OFF & FRC & XT_PLL16); - _FOSC(CSW_FSCM_OFF & FRC & XTL); - _FOSC(CSW_FSCM_OFF & FRC & FRC_PLL4); - _FOSC(CSW_FSCM_OFF & FRC & FRC_PLL8); - _FOSC(CSW_FSCM_OFF & FRC & FRC_PLL16); - _FOSC(CSW_FSCM_OFF & FRC & HS); - _FOSC(CSW_FSCM_OFF & LPRC & EC); - _FOSC(CSW_FSCM_OFF & LPRC & ECIO); - _FOSC(CSW_FSCM_OFF & LPRC & EC_PLL4); - _FOSC(CSW_FSCM_OFF & LPRC & EC_PLL8); - _FOSC(CSW_FSCM_OFF & LPRC & EC_PLL16); - _FOSC(CSW_FSCM_OFF & LPRC & ERC); - _FOSC(CSW_FSCM_OFF & LPRC & ERCIO); - _FOSC(CSW_FSCM_OFF & LPRC & XT); - _FOSC(CSW_FSCM_OFF & LPRC & XT_PLL4); - _FOSC(CSW_FSCM_OFF & LPRC & XT_PLL8); - _FOSC(CSW_FSCM_OFF & LPRC & XT_PLL16); - _FOSC(CSW_FSCM_OFF & LPRC & XTL); - _FOSC(CSW_FSCM_OFF & LPRC & FRC_PLL4); - _FOSC(CSW_FSCM_OFF & LPRC & FRC_PLL8); - _FOSC(CSW_FSCM_OFF & LPRC & FRC_PLL16); - _FOSC(CSW_FSCM_OFF & LPRC & HS); - _FOSC(CSW_ON_FSCM_OFF & EC); - _FOSC(CSW_ON_FSCM_OFF & ECIO); - _FOSC(CSW_ON_FSCM_OFF & EC_PLL4); - _FOSC(CSW_ON_FSCM_OFF & EC_PLL8); - _FOSC(CSW_ON_FSCM_OFF & EC_PLL16); - _FOSC(CSW_ON_FSCM_OFF & ERC); - _FOSC(CSW_ON_FSCM_OFF & ERCIO); - _FOSC(CSW_ON_FSCM_OFF & XT); - _FOSC(CSW_ON_FSCM_OFF & XT_PLL4); - _FOSC(CSW_ON_FSCM_OFF & XT_PLL8); - _FOSC(CSW_ON_FSCM_OFF & XT_PLL16); - _FOSC(CSW_ON_FSCM_OFF & XTL); - _FOSC(CSW_ON_FSCM_OFF & FRC_PLL4); - _FOSC(CSW_ON_FSCM_OFF & FRC_PLL8); - _FOSC(CSW_ON_FSCM_OFF & FRC_PLL16); - _FOSC(CSW_ON_FSCM_OFF & HS); - _FOSC(CSW_ON_FSCM_OFF & LP & EC); - _FOSC(CSW_ON_FSCM_OFF & LP & ECIO); - _FOSC(CSW_ON_FSCM_OFF & LP & EC_PLL4); - _FOSC(CSW_ON_FSCM_OFF & LP & EC_PLL8); - _FOSC(CSW_ON_FSCM_OFF & LP & EC_PLL16); - _FOSC(CSW_ON_FSCM_OFF & LP & ERC); - _FOSC(CSW_ON_FSCM_OFF & LP & ERCIO); - _FOSC(CSW_ON_FSCM_OFF & LP & XT); - _FOSC(CSW_ON_FSCM_OFF & LP & XT_PLL4); - _FOSC(CSW_ON_FSCM_OFF & LP & XT_PLL8); - _FOSC(CSW_ON_FSCM_OFF & LP & XT_PLL16); - _FOSC(CSW_ON_FSCM_OFF & LP & XTL); - _FOSC(CSW_ON_FSCM_OFF & LP & FRC_PLL4); - _FOSC(CSW_ON_FSCM_OFF & LP & FRC_PLL8); - _FOSC(CSW_ON_FSCM_OFF & LP & FRC_PLL16); - _FOSC(CSW_ON_FSCM_OFF & LP & HS); - _FOSC(CSW_ON_FSCM_OFF & FRC & EC); - _FOSC(CSW_ON_FSCM_OFF & FRC & ECIO); - _FOSC(CSW_ON_FSCM_OFF & FRC & EC_PLL4); - _FOSC(CSW_ON_FSCM_OFF & FRC & EC_PLL8); - _FOSC(CSW_ON_FSCM_OFF & FRC & EC_PLL16); - _FOSC(CSW_ON_FSCM_OFF & FRC & ERC); - _FOSC(CSW_ON_FSCM_OFF & FRC & ERCIO); - _FOSC(CSW_ON_FSCM_OFF & FRC & XT); - _FOSC(CSW_ON_FSCM_OFF & FRC & XT_PLL4); - _FOSC(CSW_ON_FSCM_OFF & FRC & XT_PLL8); - _FOSC(CSW_ON_FSCM_OFF & FRC & XT_PLL16); - _FOSC(CSW_ON_FSCM_OFF & FRC & XTL); - _FOSC(CSW_ON_FSCM_OFF & FRC & FRC_PLL4); - _FOSC(CSW_ON_FSCM_OFF & FRC & FRC_PLL8); - _FOSC(CSW_ON_FSCM_OFF & FRC & FRC_PLL16); - _FOSC(CSW_ON_FSCM_OFF & FRC & HS); - _FOSC(CSW_ON_FSCM_OFF & LPRC & EC); - _FOSC(CSW_ON_FSCM_OFF & LPRC & ECIO); - _FOSC(CSW_ON_FSCM_OFF & LPRC & EC_PLL4); - _FOSC(CSW_ON_FSCM_OFF & LPRC & EC_PLL8); - _FOSC(CSW_ON_FSCM_OFF & LPRC & EC_PLL16); - _FOSC(CSW_ON_FSCM_OFF & LPRC & ERC); - _FOSC(CSW_ON_FSCM_OFF & LPRC & ERCIO); - _FOSC(CSW_ON_FSCM_OFF & LPRC & XT); - _FOSC(CSW_ON_FSCM_OFF & LPRC & XT_PLL4); - _FOSC(CSW_ON_FSCM_OFF & LPRC & XT_PLL8); - _FOSC(CSW_ON_FSCM_OFF & LPRC & XT_PLL16); - _FOSC(CSW_ON_FSCM_OFF & LPRC & XTL); - _FOSC(CSW_ON_FSCM_OFF & LPRC & FRC_PLL4); - _FOSC(CSW_ON_FSCM_OFF & LPRC & FRC_PLL8); - _FOSC(CSW_ON_FSCM_OFF & LPRC & FRC_PLL16); - _FOSC(CSW_ON_FSCM_OFF & LPRC & HS); - _FOSC(CSW_FSCM_ON & EC); - _FOSC(CSW_FSCM_ON & ECIO); - _FOSC(CSW_FSCM_ON & EC_PLL4); - _FOSC(CSW_FSCM_ON & EC_PLL8); - _FOSC(CSW_FSCM_ON & EC_PLL16); - _FOSC(CSW_FSCM_ON & ERC); - _FOSC(CSW_FSCM_ON & ERCIO); - _FOSC(CSW_FSCM_ON & XT); - _FOSC(CSW_FSCM_ON & XT_PLL4); - _FOSC(CSW_FSCM_ON & XT_PLL8); - _FOSC(CSW_FSCM_ON & XT_PLL16); - _FOSC(CSW_FSCM_ON & XTL); - _FOSC(CSW_FSCM_ON & FRC_PLL4); - _FOSC(CSW_FSCM_ON & FRC_PLL8); - _FOSC(CSW_FSCM_ON & FRC_PLL16); - _FOSC(CSW_FSCM_ON & HS); - _FOSC(CSW_FSCM_ON & LP & EC); - _FOSC(CSW_FSCM_ON & LP & ECIO); - _FOSC(CSW_FSCM_ON & LP & EC_PLL4); - _FOSC(CSW_FSCM_ON & LP & EC_PLL8); - _FOSC(CSW_FSCM_ON & LP & EC_PLL16); - _FOSC(CSW_FSCM_ON & LP & ERC); - _FOSC(CSW_FSCM_ON & LP & ERCIO); - _FOSC(CSW_FSCM_ON & LP & XT); - _FOSC(CSW_FSCM_ON & LP & XT_PLL4); - _FOSC(CSW_FSCM_ON & LP & XT_PLL8); - _FOSC(CSW_FSCM_ON & LP & XT_PLL16); - _FOSC(CSW_FSCM_ON & LP & XTL); - _FOSC(CSW_FSCM_ON & LP & FRC_PLL4); - _FOSC(CSW_FSCM_ON & LP & FRC_PLL8); - _FOSC(CSW_FSCM_ON & LP & FRC_PLL16); - _FOSC(CSW_FSCM_ON & LP & HS); - _FOSC(CSW_FSCM_ON & FRC & EC); - _FOSC(CSW_FSCM_ON & FRC & ECIO); - _FOSC(CSW_FSCM_ON & FRC & EC_PLL4); - _FOSC(CSW_FSCM_ON & FRC & EC_PLL8); - _FOSC(CSW_FSCM_ON & FRC & EC_PLL16); - _FOSC(CSW_FSCM_ON & FRC & ERC); - _FOSC(CSW_FSCM_ON & FRC & ERCIO); - _FOSC(CSW_FSCM_ON & FRC & XT); - _FOSC(CSW_FSCM_ON & FRC & XT_PLL4); - _FOSC(CSW_FSCM_ON & FRC & XT_PLL8); - _FOSC(CSW_FSCM_ON & FRC & XT_PLL16); - _FOSC(CSW_FSCM_ON & FRC & XTL); - _FOSC(CSW_FSCM_ON & FRC & FRC_PLL4); - _FOSC(CSW_FSCM_ON & FRC & FRC_PLL8); - _FOSC(CSW_FSCM_ON & FRC & FRC_PLL16); - _FOSC(CSW_FSCM_ON & FRC & HS); - _FOSC(CSW_FSCM_ON & LPRC & EC); - _FOSC(CSW_FSCM_ON & LPRC & ECIO); - _FOSC(CSW_FSCM_ON & LPRC & EC_PLL4); - _FOSC(CSW_FSCM_ON & LPRC & EC_PLL8); - _FOSC(CSW_FSCM_ON & LPRC & EC_PLL16); - _FOSC(CSW_FSCM_ON & LPRC & ERC); - _FOSC(CSW_FSCM_ON & LPRC & ERCIO); - _FOSC(CSW_FSCM_ON & LPRC & XT); - _FOSC(CSW_FSCM_ON & LPRC & XT_PLL4); - _FOSC(CSW_FSCM_ON & LPRC & XT_PLL8); - _FOSC(CSW_FSCM_ON & LPRC & XT_PLL16); - _FOSC(CSW_FSCM_ON & LPRC & XTL); - _FOSC(CSW_FSCM_ON & LPRC & FRC_PLL4); - _FOSC(CSW_FSCM_ON & LPRC & FRC_PLL8); - _FOSC(CSW_FSCM_ON & LPRC & FRC_PLL16); - _FOSC(CSW_FSCM_ON & LPRC & HS); - FWDT - ===== - _FWDT(WDT_OFF); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_1); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_2); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_3); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_4); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_5); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_6); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_7); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_8); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_9); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_10); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_11); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_12); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_13); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_14); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_15); - _FWDT(WDT_ON & WDTPSA_1 & WDTPSB_16); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_1); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_2); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_3); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_4); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_5); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_6); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_7); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_8); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_9); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_10); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_11); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_12); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_13); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_14); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_15); - _FWDT(WDT_ON & WDTPSA_8 & WDTPSB_16); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_1); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_2); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_3); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_4); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_5); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_6); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_7); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_8); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_9); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_10); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_11); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_12); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_13); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_14); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_15); - _FWDT(WDT_ON & WDTPSA_64 & WDTPSB_16); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_1); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_2); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_3); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_4); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_5); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_6); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_7); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_8); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_9); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_10); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_11); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_12); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_13); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_14); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_15); - _FWDT(WDT_ON & WDTPSA_512 & WDTPSB_16); - - FBORPOR - ======== - _FBORPOR(PBOR_OFF & MCLR_DIS); - _FBORPOR(PBOR_OFF & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_20 & PWRT_OFF & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_27 & PWRT_OFF & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_42 & PWRT_OFF & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_45 & PWRT_OFF & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_20 & PWRT_OFF & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_27 & PWRT_OFF & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_42 & PWRT_OFF & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_45 & PWRT_OFF & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_20 & PWRT_4 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_27 & PWRT_4 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_42 & PWRT_4 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_45 & PWRT_4 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_20 & PWRT_4 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_27 & PWRT_4 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_42 & PWRT_4 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_45 & PWRT_4 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_20 & PWRT_16 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_27 & PWRT_16 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_42 & PWRT_16 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_45 & PWRT_16 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_20 & PWRT_16 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_27 & PWRT_16 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_42 & PWRT_16 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_45 & PWRT_16 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_20 & PWRT_64 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_27 & PWRT_64 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_42 & PWRT_64 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_45 & PWRT_64 & MCLR_DIS); - _FBORPOR(PBOR_ON & BORV_20 & PWRT_64 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_27 & PWRT_64 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_42 & PWRT_64 & MCLR_EN); - _FBORPOR(PBOR_ON & BORV_45 & PWRT_64 & MCLR_EN); - - FGS - ==== - _FGS(CODE_PROT_OFF); - _FGS(CODE_PROT_ON); - - ---------------------------------------------------------------------------- */ - - -/* -------------------------------------------- */ -/* Some useful macros for inline assembly stuff */ -/* -------------------------------------------- */ - -#define Nop() {__asm__ volatile ("nop");} -#define ClrWdt() {__asm__ volatile ("clrwdt");} -#define Sleep() {__asm__ volatile ("pwrsav #0");} -#define Idle() {__asm__ volatile ("pwrsav #1");} - -/* ---------------------------------------------------------- */ -/* Some useful macros for allocating data memory */ -/* ---------------------------------------------------------- */ - -/* The following macros require an argument N that specifies */ -/* alignment. N must a power of two, minimum value = 2. */ -/* For example, to declare an uninitialized array in X memory */ -/* that is aligned to a 32 byte address: */ -/* */ -/* int _XBSS(32) xbuf[16]; */ -/* */ -/* To declare an initialized array in data EEPROM without */ -/* special alignment: */ -/* */ -/* int _EEDATA(2) table1[] = {0, 1, 1, 2, 3, 5, 8, 13, 21}; */ -/* */ -#define _XBSS(N) __attribute__((space(xmemory),aligned(N))) -#define _XDATA(N) __attribute__((space(xmemory),aligned(N))) -#define _YBSS(N) __attribute__((space(ymemory),aligned(N))) -#define _YDATA(N) __attribute__((space(ymemory),aligned(N))) -#define _EEDATA(N) __attribute__((space(eedata),aligned(N))) - -/* The following macros do not require an argument. They can */ -/* be used to locate a variable in persistent data memory or */ -/* in near data memory. For example, to declare two variables */ -/* that retain their values across a device reset: */ -/* */ -/* int _PERSISTENT var1,var2; */ -/* */ -#define _PERSISTENT __attribute__((persistent)) -#define _NEAR __attribute__((near)) - -/* ---------------------------------------------------------- */ -/* Some useful macros for declaring functions */ -/* ---------------------------------------------------------- */ - -/* The following macros can be used to declare interrupt */ -/* service routines (ISRs). For example, to declare an ISR */ -/* for the timer1 interrupt: */ -/* */ -/* void _ISR _T1Interrupt(void); */ -/* */ -/* To declare an ISR for the SPI1 interrupt with fast */ -/* context save: */ -/* */ -/* void _ISRFAST _SPI1Interrupt(void); */ -/* */ -/* Note: ISRs will be installed into the interrupt vector */ -/* tables automatically if the reserved names listed in the */ -/* MPLAB C30 Compiler User's Guide (DS51284) are used. */ -/* */ -#define _ISR __attribute__((interrupt)) -#define _ISRFAST __attribute__((interrupt, shadow)) - -/* ---------------------------------------------------------- */ -/* Some useful macros for changing the CPU IPL */ -/* ---------------------------------------------------------- */ - -/* The following macros can be used to modify the current CPU */ -/* IPL. The definition of the macro may vary from device to */ -/* device. */ -/* */ -/* To safely set the CPU IPL, use SET_CPU_IPL(ipl); the */ -/* valid range of ipl is 0-7, it may be any expression. */ -/* */ -/* SET_CPU_IPL(7); */ -/* */ -/* To preserve the current IPL and save it use */ -/* SET_AND_SAVE_CPU_IPL(save_to, ipl); the valid range of ipl */ -/* is 0-7 and may be any expression, save_to should denote */ -/* some temporary storage. */ -/* */ -/* int old_ipl; */ -/* */ -/* SET_AND_SAVE_CPU_IPL(old_ipl, 7); */ -/* */ -/* The IPL can be restored with RESTORE_CPU_IPL(saved_to) */ -/* */ -/* RESTORE_CPU_IPL(old_ipl); */ - -#define SET_CPU_IPL(ipl) { \ - int DISI_save; \ - \ - DISI_save = DISICNT; \ - asm volatile ("disi #0x3FFF"); \ - SRbits.IPL = ipl; \ - DISICNT = DISI_save; } (void) 0; - -#define SET_AND_SAVE_CPU_IPL(save_to, ipl) { \ - save_to = SRbits.IPL; \ - SET_CPU_IPL(ipl); } (void) 0; - -#define RESTORE_CPU_IPL(saved_to) SET_CPU_IPL(saved_to) - -#endif - diff --git a/test/braketest/Makefile b/test/braketest/Makefile index c4b788d..1a97440 100644 --- a/test/braketest/Makefile +++ b/test/braketest/Makefile @@ -6,7 +6,7 @@ braketest.o:braketest.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) -I. $(CCFLAGS) braketest:braketest.o - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLDFILE) $(AICLIB) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLD) $(AICLIB) braketest.hex:braketest $(CCBIN2HEX) $^ diff --git a/test/cantest/Makefile b/test/cantest/Makefile index 56ac338..dcc0c43 100644 --- a/test/cantest/Makefile +++ b/test/cantest/Makefile @@ -6,7 +6,7 @@ cantest.o:cantest.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) -I. $(CCFLAGS) cantest:cantest.o - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLDFILE) $(AICLIB) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLD) $(AICLIB) cantest.hex:cantest $(CCBIN2HEX) $^ diff --git a/test/dsPICAICtest/Makefile b/test/dsPICAICtest/Makefile index c8d853e..f46467b 100644 --- a/test/dsPICAICtest/Makefile +++ b/test/dsPICAICtest/Makefile @@ -7,7 +7,7 @@ dspicaictest.o:dspicaictest.c dspicaictest:dspicaictest.o # pic30-elf-gcc $^ -L/usr/pic30-elf/ -Wl --script=$(PWD)/p30f4012.gld -o $@ # pic30-elf-ld -o $@ --script=$(PWD)/p30f4012.gld -L/usr/pic30-elf/ -lpic30-elf -lc-elf $^ - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) -Wl $(CCGLDFILE) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) -Wl $(CCGLD) dspicaictest.hex:dspicaictest $(CCBIN2HEX) $^ diff --git a/test/dsPICtest/Makefile b/test/dsPICtest/Makefile index ec5e7db..d025730 100644 --- a/test/dsPICtest/Makefile +++ b/test/dsPICtest/Makefile @@ -7,7 +7,7 @@ dspictest.o:dspictest.c dspictest:dspictest.o # pic30-elf-gcc $^ -L/usr/pic30-elf/ -Wl --script=$(PWD)/p30f4012.gld -o $@ # pic30-elf-ld -o $@ --script=$(PWD)/p30f4012.gld -L/usr/pic30-elf/ -lpic30-elf -lc-elf $^ - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) -Wl $(CCGLDFILE) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) -Wl $(CCGLD) dspictest.hex:dspictest $(CCBIN2HEX) $^ diff --git a/test/encodertest/Makefile b/test/encodertest/Makefile index da5e1c7..27b8715 100644 --- a/test/encodertest/Makefile +++ b/test/encodertest/Makefile @@ -6,7 +6,7 @@ encodertest.o:encodertest.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) -I. $(CCFLAGS) encodertest:encodertest.o - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLDFILE) $(AICLIB) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLD) $(AICLIB) encodertest.hex:encodertest $(CCBIN2HEX) $^ diff --git a/test/freertosAICtest/Makefile b/test/freertosAICtest/Makefile index 210f770..47c47d1 100644 --- a/test/freertosAICtest/Makefile +++ b/test/freertosAICtest/Makefile @@ -6,7 +6,7 @@ freertosAICtest.hex:freertosAICtest $(CCBIN2HEX) $^ freertosAICtest:freertosAICtest.o $(OSOBJS) - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) -Wl $(CCGLDFILE) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) -Wl $(CCGLD) freertosAICtest.o:freertosAICtest.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) $(OSINCDIR) $(CCFLAGS) $(OSFLAGS) diff --git a/test/freertostest/Makefile b/test/freertostest/Makefile index 86b6b32..c1f3600 100644 --- a/test/freertostest/Makefile +++ b/test/freertostest/Makefile @@ -6,7 +6,7 @@ freertostest.hex:freertostest $(CCBIN2HEX) $^ freertostest:freertostest.o $(OSOBJS) - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) -Wl $(CCGLDFILE) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) -Wl $(CCGLD) freertostest.o:freertostest.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) $(OSINCDIR) $(CCFLAGS) $(OSFLAGS) diff --git a/test/motortest/Makefile b/test/motortest/Makefile index 094f136..a6f1b42 100644 --- a/test/motortest/Makefile +++ b/test/motortest/Makefile @@ -6,7 +6,7 @@ motortest.o:motortest.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) -I. $(CCFLAGS) motortest:motortest.o - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLDFILE) $(AICLIB) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLD) $(AICLIB) motortest.hex:motortest $(CCBIN2HEX) $^ diff --git a/test/pwmtest/Makefile b/test/pwmtest/Makefile index 5e44529..3b51c71 100644 --- a/test/pwmtest/Makefile +++ b/test/pwmtest/Makefile @@ -6,7 +6,7 @@ pwmtest.o:pwmtest.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) -I. $(CCFLAGS) pwmtest:pwmtest.o - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLDFILE) $(AICLIB) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLD) $(AICLIB) pwmtest.hex:pwmtest $(CCBIN2HEX) $^ diff --git a/test/serialtest/Makefile b/test/serialtest/Makefile index e6a2659..805da96 100644 --- a/test/serialtest/Makefile +++ b/test/serialtest/Makefile @@ -6,7 +6,7 @@ serialtest.o:serialtest.c $(CC) $(CPU) -x c -c $^ $(CCINCDIR) -I. $(CCFLAGS) serialtest:serialtest.o - $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLDFILE) $(AICLIB) + $(CC) $(CPU) $^ -o $@ $(CCLIBDIR) $(AICLIBDIR) -Wl $(CCGLD) $(AICLIB) serialtest.hex:serialtest $(CCBIN2HEX) $^