From: Walter Fetter Lages Date: Wed, 23 May 2018 21:28:39 +0000 (-0300) Subject: Initial commit. X-Git-Tag: v1.0.0~20 X-Git-Url: http://git.ece.ufrgs.br/?a=commitdiff_plain;h=b05fbe37a59f7b27b25609f0d0727aad5b4d39fd;p=imushield.git Initial commit. --- b05fbe37a59f7b27b25609f0d0727aad5b4d39fd diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..417dca3 --- /dev/null +++ b/.gitignore @@ -0,0 +1,312 @@ +# Project specific + +# Text editor +# Backup files +*.*~ +*.bak + +# PCB +.*- + +# C++ +# Prerequisites +*.d + +# Compiled Object files +*.slo +*.lo +*.o +*.obj + +# Precompiled Headers +*.gch +*.pch + +# Compiled Dynamic libraries +*.so +*.dylib +*.dll + +# Fortran module files +*.mod +*.smod + +# Compiled Static libraries +*.lai +*.la +*.a +*.lib + +# Executables +*.exe +*.out +*.app + +# Java +# Compiled class file +*.class + +# Log file +*.log + +# BlueJ files +*.ctxt + +# Mobile Tools for Java (J2ME) +.mtj.tmp/ + +# Package Files # +*.jar +*.war +*.nar +*.ear +*.zip +*.tar.gz +*.rar + +# virtual machine crash logs, see http://www.java.com/en/download/help/error_hotspot.xml +hs_err_pid* + +#TeX +## Core latex/pdflatex auxiliary files: +*.aux +*.lof +*.log +*.lot +*.fls +*.out +*.toc +*.fmt +*.fot +*.cb +*.cb2 +.*.lb + +## Intermediate documents: +*.dvi +*.xdv +*-converted-to.* + +## Generated if empty string is given at "Please type another file name for output:" +.pdf + +## Bibliography auxiliary files (bibtex/biblatex/biber): +*.bbl +*.bcf +*.blg +*-blx.aux +*-blx.bib +*.run.xml + +## Build tool auxiliary files: +*.fdb_latexmk +*.synctex +*.synctex(busy) +*.synctex.gz +*.synctex.gz(busy) +*.pdfsync + +## Build tool directories for auxiliary files +# latexrun +latex.out/ + +## Auxiliary and intermediate files from other packages: +# algorithms +*.alg +*.loa + +# achemso +acs-*.bib + +# amsthm +*.thm + +# beamer +*.nav +*.pre +*.snm +*.vrb + +# changes +*.soc + +# cprotect +*.cpt + +# elsarticle (documentclass of Elsevier journals) +*.spl + +# endnotes +*.ent + +# fixme +*.lox + +# feynmf/feynmp +*.mf +*.mp +*.t[1-9] +*.t[1-9][0-9] +*.tfm + +#(r)(e)ledmac/(r)(e)ledpar +*.end +*.?end +*.[1-9] +*.[1-9][0-9] +*.[1-9][0-9][0-9] +*.[1-9]R +*.[1-9][0-9]R +*.[1-9][0-9][0-9]R +*.eledsec[1-9] +*.eledsec[1-9]R +*.eledsec[1-9][0-9] +*.eledsec[1-9][0-9]R +*.eledsec[1-9][0-9][0-9] +*.eledsec[1-9][0-9][0-9]R + +# glossaries +*.acn +*.acr +*.glg +*.glo +*.gls +*.glsdefs + +# gnuplottex +*-gnuplottex-* + +# gregoriotex +*.gaux +*.gtex + +# htlatex +*.4ct +*.4tc +*.idv +*.lg +*.trc +*.xref + +# hyperref +*.brf + +# knitr +*-concordance.tex +# TODO Comment the next line if you want to keep your tikz graphics files +*.tikz +*-tikzDictionary + +# listings +*.lol + +# makeidx +*.idx +*.ilg +*.ind +*.ist + +# minitoc +*.maf +*.mlf +*.mlt +*.mtc[0-9]* +*.slf[0-9]* +*.slt[0-9]* +*.stc[0-9]* + +# minted +_minted* +*.pyg + +# morewrites +*.mw + +# nomencl +*.nlg +*.nlo +*.nls + +# pax +*.pax + +# pdfpcnotes +*.pdfpc + +# sagetex +*.sagetex.sage +*.sagetex.py +*.sagetex.scmd + +# scrwfile +*.wrt + +# sympy +*.sout +*.sympy +sympy-plots-for-*.tex/ + +# pdfcomment +*.upa +*.upb + +# pythontex +*.pytxcode +pythontex-files-*/ + +# thmtools +*.loe + +# TikZ & PGF +*.dpth +*.md5 +*.auxlock + +# todonotes +*.tdo + +# easy-todo +*.lod + +# xmpincl +*.xmpi + +# xindy +*.xdy + +# xypic precompiled matrices +*.xyc + +# endfloat +*.ttt +*.fff + +# Latexian +TSWLatexianTemp* + +## Editors: +# WinEdt +*.bak +*.sav + +# Texpad +.texpadtmp + +# Kile +*.backup + +# KBibTeX +*~[0-9]* + +# auto folder when using emacs and auctex +./auto/* +*.el + +# expex forward references with \gathertags +*-tags.tex + +# standalone packages +*.sta + +# generated if using elsarticle.cls +*.spl diff --git a/3485.sch b/3485.sch new file mode 100644 index 0000000..fb74ac7 --- /dev/null +++ b/3485.sch @@ -0,0 +1,104 @@ +v 20110115 2 +C 47800 54000 1 180 0 output-2.sym +{ +T 47600 53300 5 10 0 0 180 0 1 +device=none +T 46900 53900 5 10 1 1 180 1 1 +value=RX +} +C 46400 52400 1 0 0 input-2.sym +{ +T 47000 53100 5 10 0 0 0 0 1 +device=none +T 46900 52500 5 10 1 1 0 7 1 +value=TX +} +N 52500 53500 52500 55400 4 +N 52000 52900 52500 52900 4 +N 52500 51500 52500 52900 4 +T 52000 53100 9 10 1 0 0 0 1 ++ +T 52000 53300 9 10 1 0 0 0 1 +- +N 47800 52500 49200 52500 4 +N 49200 52500 49200 52900 4 +N 49200 52900 50400 52900 4 +N 52500 53500 52000 53500 4 +N 52000 53100 52700 53100 4 +N 52000 53300 52700 53300 4 +C 50400 52700 1 0 0 MAX3485.sym +{ +T 50675 55950 5 10 0 0 0 0 1 +device=MAX485 +T 51500 53850 5 10 1 1 0 0 1 +refdes=U? +T 50675 55150 5 10 0 0 0 0 1 +footprint=so8 +} +C 52300 51200 1 0 0 ground.sym +C 52300 55400 1 0 0 3.3V-plus-1.sym +C 45100 48900 0 0 0 title-A4.sym +N 47800 53900 49200 53900 4 +N 49200 53900 49200 53500 4 +N 49200 53500 50400 53500 4 +C 48300 53300 1 180 0 io-1.sym +{ +T 48100 52700 5 10 0 0 180 0 1 +device=none +T 47400 53200 5 10 1 1 180 1 1 +value=DIRECTION485 +} +N 48300 53200 49600 53200 4 +N 50400 53100 49600 53100 4 +N 49600 53100 49600 53300 4 +N 50400 53300 49600 53300 4 +C 54600 53700 1 270 0 capacitor-1.sym +{ +T 55300 53500 5 10 0 0 270 0 1 +device=CAPACITOR +T 55100 53300 5 10 1 1 0 0 1 +refdes=C? +T 55500 53500 5 10 0 0 270 0 1 +symversion=0.1 +T 54900 53000 5 10 1 1 0 0 1 +value=104F(100nF) +} +N 54800 53900 52500 53900 4 +N 52500 52600 54800 52600 4 +N 54800 53900 54800 53700 4 +C 49800 53800 1 90 0 resistor-1.sym +{ +T 49400 54100 5 10 0 0 90 0 1 +device=RESISTOR +T 50100 54200 5 10 1 1 180 0 1 +refdes=R? +T 49800 53800 5 10 1 1 0 0 1 +value=10K +} +N 49700 53500 49700 53800 4 +N 49700 54700 52500 54700 4 +T 49900 49700 9 20 1 0 0 0 1 +Interface RS485 +T 53600 49000 9 10 1 0 0 0 1 +Emílio D. Cantú +T 49700 49300 9 10 1 0 0 0 1 +3485.sch +C 53300 52900 1 0 0 io-1.sym +{ +T 53500 53500 5 10 0 0 0 0 1 +device=none +T 54200 53000 5 10 1 1 0 1 1 +value=D+ +} +C 53300 53300 1 0 0 io-1.sym +{ +T 53500 53900 5 10 0 0 0 0 1 +device=none +T 54200 53400 5 10 1 1 0 1 1 +value=D- +} +N 54800 52600 54800 52800 4 +N 53300 53000 52700 53000 4 +N 52700 53000 52700 53100 4 +N 53300 53400 52700 53400 4 +N 52700 53400 52700 53300 4 diff --git a/accel.sch b/accel.sch new file mode 100644 index 0000000..4567694 --- /dev/null +++ b/accel.sch @@ -0,0 +1,143 @@ +v 20110115 2 +C 43300 42100 0 0 0 title-A4.sym +T 47800 42400 9 20 1 0 0 0 2 +Acelerômetro + +T 51600 42200 9 10 1 0 0 0 1 +Emílio D. Cantú +C 45500 49100 1 0 0 3.3V-plus-1.sym +C 49300 45500 1 0 0 LIS331DLH.sym +{ +T 49575 48750 5 10 0 0 0 0 1 +device=MAX485 +T 49575 47950 5 10 0 0 0 0 1 +footprint=so8 +T 49300 47650 5 10 1 1 0 0 1 +refdes=U? +} +C 52500 43900 1 0 0 ground.sym +C 47900 44300 1 180 0 io-1.sym +{ +T 47000 44100 5 10 0 0 180 0 1 +net=IO:1 +T 47700 43700 5 10 0 0 180 0 1 +device=none +T 47000 44200 5 10 1 1 180 1 1 +value=SIG_ACS_CS +} +C 47900 44800 1 180 0 io-1.sym +{ +T 47000 44600 5 10 0 0 180 0 1 +net=IO:1 +T 47700 44200 5 10 0 0 180 0 1 +device=none +T 47000 44700 5 10 1 1 180 1 1 +value=SIG_MISO +} +C 47900 45300 1 180 0 io-1.sym +{ +T 47000 45100 5 10 0 0 180 0 1 +net=IO:1 +T 47700 44700 5 10 0 0 180 0 1 +device=none +T 47000 45200 5 10 1 1 180 1 1 +value=SIG_MOSI +} +C 47900 45800 1 180 0 io-1.sym +{ +T 47000 45600 5 10 0 0 180 0 1 +net=IO:1 +T 47700 45200 5 10 0 0 180 0 1 +device=none +T 47000 45700 5 10 1 1 180 1 1 +value=SIG_SCK +} +T 47300 45800 9 10 1 0 0 0 1 +clock serial +T 47300 45300 9 10 1 0 0 0 1 +SPI input/I2C data +T 47300 44800 9 10 1 0 0 0 1 +SPI output +T 47300 44300 9 10 1 0 0 0 1 +serial control +C 48800 46700 1 0 0 nc-left-1.sym +{ +T 48800 47100 5 10 0 0 0 0 1 +value=NoConnection +T 48800 47500 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 48800 46500 1 0 0 nc-left-1.sym +{ +T 48800 46900 5 10 0 0 0 0 1 +value=NoConnection +T 48800 47300 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 51700 46700 1 0 0 nc-right-1.sym +{ +T 51800 47200 5 10 0 0 0 0 1 +value=NoConnection +T 51800 47400 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 51700 46300 1 0 0 nc-right-1.sym +{ +T 51800 46800 5 10 0 0 0 0 1 +value=NoConnection +T 51800 47000 5 10 0 0 0 0 1 +device=DRC_Directive +} +N 50200 47900 50200 48900 4 +N 50200 48900 52700 48900 4 +N 50800 47900 50800 48900 4 +N 51700 47000 52700 47000 4 +N 52700 44200 52700 48900 4 +N 51700 46600 52700 46600 4 +N 50200 45500 50200 45000 4 +N 50200 45000 52700 45000 4 +C 49700 48300 1 90 0 capacitor-1.sym +{ +T 49000 48500 5 10 0 0 90 0 1 +device=CAPACITOR +T 49900 49000 5 10 1 1 180 0 1 +refdes=C? +T 48800 48500 5 10 0 0 90 0 1 +symversion=0.1 +T 49600 48500 5 10 1 1 0 0 1 +value=10nF +} +C 48800 48300 1 90 0 capacitor-1.sym +{ +T 48100 48500 5 10 0 0 90 0 1 +device=CAPACITOR +T 48400 49000 5 10 1 1 180 0 1 +refdes=C? +T 47900 48500 5 10 0 0 90 0 1 +symversion=0.1 +T 48000 48500 5 10 1 1 0 0 1 +value=100nF +} +N 50400 47900 50400 48200 4 +N 45700 49100 45700 48200 4 +N 45700 48200 50600 48200 4 +N 50600 47900 50600 48200 4 +N 48600 48300 48600 48200 4 +N 49500 48300 49500 48200 4 +N 50800 48900 50800 49600 4 +N 50800 49600 48600 49600 4 +N 49500 49200 49500 49600 4 +N 48600 49200 48600 49600 4 +N 47500 48200 47500 47000 4 +N 47500 47000 49300 47000 4 +N 47900 45700 49100 45700 4 +N 49100 45700 49100 46400 4 +N 49100 46400 49300 46400 4 +N 47900 45200 50400 45200 4 +N 50400 45200 50400 45500 4 +N 47900 44700 50600 44700 4 +N 50600 44700 50600 45500 4 +N 47900 44200 50800 44200 4 +N 50800 44200 50800 45500 4 +T 47800 42500 9 10 1 0 0 0 1 +accel.sch diff --git a/gafrc b/gafrc new file mode 100644 index 0000000..6e40065 --- /dev/null +++ b/gafrc @@ -0,0 +1 @@ +(component-library "./symbols") diff --git a/galileoconnectors.sch b/galileoconnectors.sch new file mode 100644 index 0000000..a9bdd25 --- /dev/null +++ b/galileoconnectors.sch @@ -0,0 +1,994 @@ +v 20110115 2 +C 66200 47200 1 0 1 EMBEDDEDconnector6-1.sym +[ +B 65700 47200 500 1900 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +L 64800 47400 65700 47400 3 0 0 0 -1 -1 +L 64800 47700 65700 47700 3 0 0 0 -1 -1 +L 64800 48000 65700 48000 3 0 0 0 -1 -1 +L 64800 48300 65700 48300 3 0 0 0 -1 -1 +L 64800 48600 65700 48600 3 0 0 0 -1 -1 +L 64800 48900 65700 48900 3 0 0 0 -1 -1 +P 64800 47700 64500 47700 1 0 1 +{ +T 65950 47650 5 8 1 1 0 6 1 +pinnumber=5 +T 65950 47650 5 8 0 0 0 6 1 +pinseq=5 +T 65950 47650 5 8 0 1 0 6 1 +pinlabel=5 +T 65950 47650 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 48300 64500 48300 1 0 1 +{ +T 65950 48250 5 8 1 1 0 6 1 +pinnumber=3 +T 65950 48250 5 8 0 0 0 6 1 +pinseq=3 +T 65950 48250 5 8 0 1 0 6 1 +pinlabel=3 +T 65950 48250 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 48900 64500 48900 1 0 1 +{ +T 65950 48850 5 8 1 1 0 6 1 +pinnumber=1 +T 65950 48850 5 8 0 0 0 6 1 +pinseq=1 +T 65950 48850 5 8 0 1 0 6 1 +pinlabel=1 +T 65950 48850 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 47400 64500 47400 1 0 1 +{ +T 65950 47350 5 8 1 1 0 6 1 +pinnumber=6 +T 65950 47350 5 8 0 0 0 6 1 +pinseq=6 +T 65950 47350 5 8 0 1 0 6 1 +pinlabel=6 +T 65950 47350 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 48000 64500 48000 1 0 1 +{ +T 65950 47950 5 8 1 1 0 6 1 +pinnumber=4 +T 65950 47950 5 8 0 0 0 6 1 +pinseq=4 +T 65950 47950 5 8 0 1 0 6 1 +pinlabel=4 +T 65950 47950 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 48600 64500 48600 1 0 1 +{ +T 65950 48550 5 8 1 1 0 6 1 +pinnumber=2 +T 65950 48550 5 8 0 0 0 6 1 +pinseq=2 +T 65950 48550 5 8 0 1 0 6 1 +pinlabel=2 +T 65950 48550 5 8 0 1 0 6 1 +pintype=pas +} +T 66100 49200 8 10 0 1 0 6 1 +refdes=CONN? +T 64400 49000 5 10 0 0 0 6 1 +device=CONNECTOR_6 +] +{ +T 64400 49000 5 10 0 0 0 6 1 +device=CONNECTOR_6 +T 66100 49200 5 10 1 1 0 6 1 +refdes=J4 +T 66200 47200 5 10 0 1 0 0 1 +footprint=JUMPER6 +} +C 66200 43800 1 0 1 EMBEDDEDconnector8-1.sym +[ +B 65700 43800 500 2500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +L 64800 44000 65700 44000 3 0 0 0 -1 -1 +L 64800 44300 65700 44300 3 0 0 0 -1 -1 +L 64800 44600 65700 44600 3 0 0 0 -1 -1 +L 64800 44900 65700 44900 3 0 0 0 -1 -1 +L 64800 45200 65700 45200 3 0 0 0 -1 -1 +L 64800 45500 65700 45500 3 0 0 0 -1 -1 +L 64800 45800 65700 45800 3 0 0 0 -1 -1 +L 64800 46100 65700 46100 3 0 0 0 -1 -1 +P 64800 44300 64500 44300 1 0 1 +{ +T 65950 44250 5 8 1 1 0 6 1 +pinnumber=7 +T 65950 44250 5 8 0 0 0 6 1 +pinseq=7 +T 65950 44250 5 8 0 1 0 6 1 +pinlabel=7 +T 65950 44250 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 44900 64500 44900 1 0 1 +{ +T 65950 44850 5 8 1 1 0 6 1 +pinnumber=5 +T 65950 44850 5 8 0 0 0 6 1 +pinseq=5 +T 65950 44850 5 8 0 1 0 6 1 +pinlabel=5 +T 65950 44850 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 45500 64500 45500 1 0 1 +{ +T 65950 45450 5 8 1 1 0 6 1 +pinnumber=3 +T 65950 45450 5 8 0 0 0 6 1 +pinseq=3 +T 65950 45450 5 8 0 1 0 6 1 +pinlabel=3 +T 65950 45450 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 46100 64500 46100 1 0 1 +{ +T 65950 46050 5 8 1 1 0 6 1 +pinnumber=1 +T 65950 46050 5 8 0 0 0 6 1 +pinseq=1 +T 65950 46050 5 8 0 1 0 6 1 +pinlabel=1 +T 65950 46050 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 44000 64500 44000 1 0 1 +{ +T 65950 43950 5 8 1 1 0 6 1 +pinnumber=8 +T 65950 43950 5 8 0 0 0 6 1 +pinseq=8 +T 65950 43950 5 8 0 1 0 6 1 +pinlabel=8 +T 65950 43950 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 44600 64500 44600 1 0 1 +{ +T 65950 44550 5 8 1 1 0 6 1 +pinnumber=6 +T 65950 44550 5 8 0 0 0 6 1 +pinseq=6 +T 65950 44550 5 8 0 1 0 6 1 +pinlabel=6 +T 65950 44550 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 45200 64500 45200 1 0 1 +{ +T 65950 45150 5 8 1 1 0 6 1 +pinnumber=4 +T 65950 45150 5 8 0 0 0 6 1 +pinseq=4 +T 65950 45150 5 8 0 1 0 6 1 +pinlabel=4 +T 65950 45150 5 8 0 1 0 6 1 +pintype=pas +} +P 64800 45800 64500 45800 1 0 1 +{ +T 65950 45750 5 8 1 1 0 6 1 +pinnumber=2 +T 65950 45750 5 8 0 0 0 6 1 +pinseq=2 +T 65950 45750 5 8 0 1 0 6 1 +pinlabel=2 +T 65950 45750 5 8 0 1 0 6 1 +pintype=pas +} +T 66100 46800 5 10 0 0 0 6 1 +pins=8 +T 66100 46600 5 10 0 0 0 6 1 +class=IO +T 66100 46400 8 10 0 1 0 6 1 +refdes=CONN? +T 66100 47000 5 10 0 0 0 6 1 +device=CONNECTOR_8 +] +{ +T 66100 47000 5 10 0 0 0 6 1 +device=CONNECTOR_8 +T 66100 46400 5 10 1 1 0 6 1 +refdes=J1 +T 66200 43800 5 10 0 1 0 0 1 +footprint=JUMPER8 +} +C 69700 44200 1 0 0 EMBEDDEDnc-left-1.sym +[ +L 70000 44200 70000 44400 3 0 0 0 -1 -1 +P 70200 44300 70000 44300 1 0 0 +{ +T 70300 44200 5 10 0 0 0 0 1 +pinseq=1 +T 70300 44400 5 10 0 0 0 0 1 +pinnumber=1 +} +T 69700 45200 8 10 0 0 0 0 1 +graphical=1 +T 69700 45000 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 44800 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69950 44300 9 10 1 0 0 7 1 +NC +T 69700 44600 8 10 0 0 0 0 1 +value=NoConnection +] +{ +T 69700 44600 5 10 0 0 0 0 1 +value=NoConnection +T 69700 45000 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 64000 47300 1 0 0 EMBEDDEDnc-left-1.sym +[ +L 64300 47300 64300 47500 3 0 0 0 -1 -1 +P 64500 47400 64300 47400 1 0 0 +{ +T 64600 47300 5 10 0 0 0 0 1 +pinseq=1 +T 64600 47500 5 10 0 0 0 0 1 +pinnumber=1 +} +T 64000 48300 8 10 0 0 0 0 1 +graphical=1 +T 64000 48100 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 47900 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64250 47400 9 10 1 0 0 7 1 +NC +T 64000 47700 8 10 0 0 0 0 1 +value=NoConnection +] +{ +T 64000 47700 5 10 0 0 0 0 1 +value=NoConnection +T 64000 48100 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 64000 44800 1 0 0 EMBEDDEDnc-left-1.sym +[ +L 64300 44800 64300 45000 3 0 0 0 -1 -1 +P 64500 44900 64300 44900 1 0 0 +{ +T 64600 44800 5 10 0 0 0 0 1 +pinseq=1 +T 64600 45000 5 10 0 0 0 0 1 +pinnumber=1 +} +T 64000 45800 8 10 0 0 0 0 1 +graphical=1 +T 64000 45600 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 45400 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64250 44900 9 10 1 0 0 7 1 +NC +T 64000 45200 8 10 0 0 0 0 1 +value=NoConnection +] +{ +T 64000 45200 5 10 0 0 0 0 1 +value=NoConnection +T 64000 45600 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 69700 48500 1 0 0 EMBEDDEDnc-left-1.sym +[ +L 70000 48500 70000 48700 3 0 0 0 -1 -1 +P 70200 48600 70000 48600 1 0 0 +{ +T 70300 48500 5 10 0 0 0 0 1 +pinseq=1 +T 70300 48700 5 10 0 0 0 0 1 +pinnumber=1 +} +T 69700 49500 8 10 0 0 0 0 1 +graphical=1 +T 69700 49300 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 49100 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69950 48600 9 10 1 0 0 7 1 +NC +T 69700 48900 8 10 0 0 0 0 1 +value=NoConnection +] +{ +T 69700 48900 5 10 0 0 0 0 1 +value=NoConnection +T 69700 49300 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 69700 44500 1 0 0 EMBEDDEDnc-left-1.sym +[ +L 70000 44500 70000 44700 3 0 0 0 -1 -1 +P 70200 44600 70000 44600 1 0 0 +{ +T 70300 44500 5 10 0 0 0 0 1 +pinseq=1 +T 70300 44700 5 10 0 0 0 0 1 +pinnumber=1 +} +T 69700 45500 8 10 0 0 0 0 1 +graphical=1 +T 69700 45300 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 45100 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69950 44600 9 10 1 0 0 7 1 +NC +T 69700 44900 8 10 0 0 0 0 1 +value=NoConnection +] +{ +T 69700 44900 5 10 0 0 0 0 1 +value=NoConnection +T 69700 45300 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 64000 47600 1 0 0 EMBEDDEDnc-left-1.sym +[ +L 64300 47600 64300 47800 3 0 0 0 -1 -1 +P 64500 47700 64300 47700 1 0 0 +{ +T 64600 47600 5 10 0 0 0 0 1 +pinseq=1 +T 64600 47800 5 10 0 0 0 0 1 +pinnumber=1 +} +T 64000 48600 8 10 0 0 0 0 1 +graphical=1 +T 64000 48400 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 48200 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64250 47700 9 10 1 0 0 7 1 +NC +T 64000 48000 8 10 0 0 0 0 1 +value=NoConnection +] +{ +T 64000 48000 5 10 0 0 0 0 1 +value=NoConnection +T 64000 48400 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 64000 48200 1 0 0 EMBEDDEDnc-left-1.sym +[ +L 64300 48200 64300 48400 3 0 0 0 -1 -1 +P 64500 48300 64300 48300 1 0 0 +{ +T 64600 48200 5 10 0 0 0 0 1 +pinseq=1 +T 64600 48400 5 10 0 0 0 0 1 +pinnumber=1 +} +T 64000 49200 8 10 0 0 0 0 1 +graphical=1 +T 64000 49000 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 48800 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64250 48300 9 10 1 0 0 7 1 +NC +T 64000 48600 8 10 0 0 0 0 1 +value=NoConnection +] +{ +T 64000 48600 5 10 0 0 0 0 1 +value=NoConnection +T 64000 49000 5 10 0 0 0 0 1 +device=DRC_Directive +} +T 72000 46300 9 10 1 0 0 0 1 +IO8 +T 72000 46000 9 10 1 0 0 0 1 +IO9 +T 72000 44500 9 10 1 0 0 0 1 +GND +T 72000 43600 9 10 1 0 0 0 1 +SCL +C 64000 48800 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 64500 48900 64300 48900 1 0 0 +{ +T 64600 48800 5 10 0 0 0 0 1 +pinseq=1 +T 64600 49000 5 10 0 0 0 0 1 +pinnumber=1 +} +L 64300 48800 64300 49000 3 0 0 0 -1 -1 +T 64000 49200 8 10 0 0 0 0 1 +value=NoConnection +T 64250 48900 9 10 1 0 0 7 1 +NC +T 64000 49400 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64000 49600 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 49800 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 64000 49200 5 10 0 0 0 0 1 +value=NoConnection +T 64000 49600 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 69700 48800 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 70200 48900 70000 48900 1 0 0 +{ +T 70300 48800 5 10 0 0 0 0 1 +pinseq=1 +T 70300 49000 5 10 0 0 0 0 1 +pinnumber=1 +} +L 70000 48800 70000 49000 3 0 0 0 -1 -1 +T 69700 49200 8 10 0 0 0 0 1 +value=NoConnection +T 69950 48900 9 10 1 0 0 7 1 +NC +T 69700 49400 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69700 49600 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 49800 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 69700 49200 5 10 0 0 0 0 1 +value=NoConnection +T 69700 49600 5 10 0 0 0 0 1 +device=DRC_Directive +} +T 66300 45400 9 10 1 0 0 0 1 +RST +T 66300 45100 9 10 1 0 0 0 1 +3.3V +T 66300 44800 9 10 1 0 0 0 1 +5V +T 66300 44500 9 10 1 0 0 0 1 +GND +T 66300 44200 9 10 1 0 0 0 1 +GND +T 66300 43900 9 10 1 0 0 0 1 +VIN +C 61600 41900 0 0 0 title-A4.sym +T 66200 42600 9 20 1 0 0 0 1 +Interface Galileo +T 70100 42000 9 10 1 0 0 0 1 +Emílio D. Cantú +T 66100 42300 9 10 1 0 0 0 1 +galileoconnectors.sch +C 71900 43500 1 0 1 connector10-1.sym +{ +T 70000 46500 5 10 0 0 0 6 1 +device=CONNECTOR_10 +T 71800 46700 5 10 1 1 0 6 1 +refdes=CONN? +T 71700 43300 5 10 1 1 0 0 1 +value=4U-0118XFXG10 +} +C 71900 47200 1 0 1 EMBEDDEDconnector8-1.sym +[ +P 70500 49200 70200 49200 1 0 1 +{ +T 71650 49150 5 8 1 1 0 6 1 +pinnumber=2 +T 71650 49150 5 8 0 0 0 6 1 +pinseq=2 +T 71650 49150 5 8 0 1 0 6 1 +pinlabel=2 +T 71650 49150 5 8 0 1 0 6 1 +pintype=pas +} +P 70500 48600 70200 48600 1 0 1 +{ +T 71650 48550 5 8 1 1 0 6 1 +pinnumber=4 +T 71650 48550 5 8 0 0 0 6 1 +pinseq=4 +T 71650 48550 5 8 0 1 0 6 1 +pinlabel=4 +T 71650 48550 5 8 0 1 0 6 1 +pintype=pas +} +P 70500 48000 70200 48000 1 0 1 +{ +T 71650 47950 5 8 1 1 0 6 1 +pinnumber=6 +T 71650 47950 5 8 0 0 0 6 1 +pinseq=6 +T 71650 47950 5 8 0 1 0 6 1 +pinlabel=6 +T 71650 47950 5 8 0 1 0 6 1 +pintype=pas +} +P 70500 47400 70200 47400 1 0 1 +{ +T 71650 47350 5 8 1 1 0 6 1 +pinnumber=8 +T 71650 47350 5 8 0 0 0 6 1 +pinseq=8 +T 71650 47350 5 8 0 1 0 6 1 +pinlabel=8 +T 71650 47350 5 8 0 1 0 6 1 +pintype=pas +} +P 70500 49500 70200 49500 1 0 1 +{ +T 71650 49450 5 8 1 1 0 6 1 +pinnumber=1 +T 71650 49450 5 8 0 0 0 6 1 +pinseq=1 +T 71650 49450 5 8 0 1 0 6 1 +pinlabel=1 +T 71650 49450 5 8 0 1 0 6 1 +pintype=pas +} +P 70500 48900 70200 48900 1 0 1 +{ +T 71650 48850 5 8 1 1 0 6 1 +pinnumber=3 +T 71650 48850 5 8 0 0 0 6 1 +pinseq=3 +T 71650 48850 5 8 0 1 0 6 1 +pinlabel=3 +T 71650 48850 5 8 0 1 0 6 1 +pintype=pas +} +P 70500 48300 70200 48300 1 0 1 +{ +T 71650 48250 5 8 1 1 0 6 1 +pinnumber=5 +T 71650 48250 5 8 0 0 0 6 1 +pinseq=5 +T 71650 48250 5 8 0 1 0 6 1 +pinlabel=5 +T 71650 48250 5 8 0 1 0 6 1 +pintype=pas +} +P 70500 47700 70200 47700 1 0 1 +{ +T 71650 47650 5 8 1 1 0 6 1 +pinnumber=7 +T 71650 47650 5 8 0 0 0 6 1 +pinseq=7 +T 71650 47650 5 8 0 1 0 6 1 +pinlabel=7 +T 71650 47650 5 8 0 1 0 6 1 +pintype=pas +} +L 70500 49500 71400 49500 3 0 0 0 -1 -1 +L 70500 49200 71400 49200 3 0 0 0 -1 -1 +L 70500 48900 71400 48900 3 0 0 0 -1 -1 +L 70500 48600 71400 48600 3 0 0 0 -1 -1 +L 70500 48300 71400 48300 3 0 0 0 -1 -1 +L 70500 48000 71400 48000 3 0 0 0 -1 -1 +L 70500 47700 71400 47700 3 0 0 0 -1 -1 +L 70500 47400 71400 47400 3 0 0 0 -1 -1 +B 71400 47200 500 2500 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +T 71800 50400 5 10 0 0 0 6 1 +device=CONNECTOR_8 +T 71800 49800 8 10 0 1 0 6 1 +refdes=CONN? +T 71800 50000 5 10 0 0 0 6 1 +class=IO +T 71800 50200 5 10 0 0 0 6 1 +pins=8 +] +{ +T 71800 50400 5 10 0 0 0 6 1 +device=CONNECTOR_8 +T 71800 49800 5 10 1 1 0 6 1 +refdes=J1 +T 71900 47200 5 10 0 1 0 0 1 +footprint=JUMPER8 +} +T 72000 43900 9 10 1 0 0 0 1 +SDA +T 72000 44200 9 10 1 0 0 0 1 +AREF +C 69700 43900 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 70200 44000 70000 44000 1 0 0 +{ +T 70300 43900 5 10 0 0 0 0 1 +pinseq=1 +T 70300 44100 5 10 0 0 0 0 1 +pinnumber=1 +} +L 70000 43900 70000 44100 3 0 0 0 -1 -1 +T 69700 44300 8 10 0 0 0 0 1 +value=NoConnection +T 69950 44000 9 10 1 0 0 7 1 +NC +T 69700 44500 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69700 44700 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 44900 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 69700 44300 5 10 0 0 0 0 1 +value=NoConnection +T 69700 44700 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 69700 43600 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 70200 43700 70000 43700 1 0 0 +{ +T 70300 43600 5 10 0 0 0 0 1 +pinseq=1 +T 70300 43800 5 10 0 0 0 0 1 +pinnumber=1 +} +L 70000 43600 70000 43800 3 0 0 0 -1 -1 +T 69700 44000 8 10 0 0 0 0 1 +value=NoConnection +T 69950 43700 9 10 1 0 0 7 1 +NC +T 69700 44200 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69700 44400 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 44600 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 69700 44000 5 10 0 0 0 0 1 +value=NoConnection +T 69700 44400 5 10 0 0 0 0 1 +device=DRC_Directive +} +T 66300 48800 9 10 1 0 0 0 1 +AIN0 +T 66300 48500 9 10 1 0 0 0 1 +AIN1 +T 66300 48200 9 10 1 0 0 0 1 +AIN2 +T 66300 47900 9 10 1 0 0 0 1 +AIN3 +T 66300 47600 9 10 1 0 0 0 1 +AIN4 +T 66300 47300 9 10 1 0 0 0 1 +AIN5 +T 72000 49400 9 10 1 0 0 0 1 +(RX) IO0 +T 72000 49100 9 10 1 0 0 0 1 +(TX) IO1 +T 72000 48800 9 10 1 0 0 0 1 +IO2 +T 72000 45700 9 10 1 0 0 0 1 +(SS) IO10 +T 72000 45400 9 10 1 0 0 0 1 +(MOSI) IO11 +T 72000 45100 9 10 1 0 0 0 1 +(MISO) IO12 +T 72000 44800 9 10 1 0 0 0 1 +(SCK) IO13 +T 72000 47300 9 10 1 0 0 0 1 +IO7 +C 68800 49400 1 0 0 input-2.sym +{ +T 69400 50100 5 10 0 0 0 0 1 +device=none +T 69300 49500 5 10 1 1 0 7 1 +value=RX +} +C 70200 49300 1 180 0 output-2.sym +{ +T 70000 48600 5 10 0 0 180 0 1 +device=none +T 69300 49200 5 10 1 1 180 1 1 +value=TX +} +T 66300 45700 9 10 1 0 0 0 1 +IOREF +C 64000 45700 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 64500 45800 64300 45800 1 0 0 +{ +T 64600 45700 5 10 0 0 0 0 1 +pinseq=1 +T 64600 45900 5 10 0 0 0 0 1 +pinnumber=1 +} +L 64300 45700 64300 45900 3 0 0 0 -1 -1 +T 64000 46100 8 10 0 0 0 0 1 +value=NoConnection +T 64250 45800 9 10 1 0 0 7 1 +NC +T 64000 46300 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64000 46500 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 46700 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 64000 46100 5 10 0 0 0 0 1 +value=NoConnection +T 64000 46500 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 64000 48500 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 64500 48600 64300 48600 1 0 0 +{ +T 64600 48500 5 10 0 0 0 0 1 +pinseq=1 +T 64600 48700 5 10 0 0 0 0 1 +pinnumber=1 +} +L 64300 48500 64300 48700 3 0 0 0 -1 -1 +T 64000 48900 8 10 0 0 0 0 1 +value=NoConnection +T 64250 48600 9 10 1 0 0 7 1 +NC +T 64000 49100 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64000 49300 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 49500 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 64000 48900 5 10 0 0 0 0 1 +value=NoConnection +T 64000 49300 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 64000 47900 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 64500 48000 64300 48000 1 0 0 +{ +T 64600 47900 5 10 0 0 0 0 1 +pinseq=1 +T 64600 48100 5 10 0 0 0 0 1 +pinnumber=1 +} +L 64300 47900 64300 48100 3 0 0 0 -1 -1 +T 64000 48300 8 10 0 0 0 0 1 +value=NoConnection +T 64250 48000 9 10 1 0 0 7 1 +NC +T 64000 48500 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64000 48700 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 48900 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 64000 48300 5 10 0 0 0 0 1 +value=NoConnection +T 64000 48700 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 64000 46000 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 64500 46100 64300 46100 1 0 0 +{ +T 64600 46000 5 10 0 0 0 0 1 +pinseq=1 +T 64600 46200 5 10 0 0 0 0 1 +pinnumber=1 +} +L 64300 46000 64300 46200 3 0 0 0 -1 -1 +T 64000 46400 8 10 0 0 0 0 1 +value=NoConnection +T 64250 46100 9 10 1 0 0 7 1 +NC +T 64000 46600 8 10 0 0 0 0 1 +documentation=nc.pdf +T 64000 46800 8 10 0 0 0 0 1 +device=DRC_Directive +T 64000 47000 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 64000 46400 5 10 0 0 0 0 1 +value=NoConnection +T 64000 46800 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 63100 43700 1 0 0 gnd-1.sym +N 64500 44600 63900 44600 4 +N 63900 44600 63900 44300 4 +N 63200 44300 63200 44000 4 +T 72000 48500 9 10 1 0 0 0 1 +IO3 +T 72000 48200 9 10 1 0 0 0 1 +IO4 +T 72000 47900 9 10 1 0 0 0 1 +IO5 +T 72000 47600 9 10 1 0 0 0 1 +IO6 +C 70200 45300 1 180 0 io-1.sym +{ +T 69300 45100 5 10 0 0 180 0 1 +net=IO:1 +T 70000 44700 5 10 0 0 180 0 1 +device=none +T 69300 45200 5 10 1 1 180 1 1 +value=SIG_MISO +} +C 70200 45600 1 180 0 io-1.sym +{ +T 69300 45400 5 10 0 0 180 0 1 +net=IO:1 +T 70000 45000 5 10 0 0 180 0 1 +device=none +T 69300 45500 5 10 1 1 180 1 1 +value=SIG_MOSI +} +C 70200 45000 1 180 0 io-1.sym +{ +T 69300 44800 5 10 0 0 180 0 1 +net=IO:1 +T 70000 44400 5 10 0 0 180 0 1 +device=none +T 69300 44900 5 10 1 1 180 1 1 +value=SIG_SCK +} +C 70200 46500 1 180 0 io-1.sym +{ +T 69300 46300 5 10 0 0 180 0 1 +net=IO:1 +T 70000 45900 5 10 0 0 180 0 1 +device=none +T 69300 46400 5 10 1 1 180 1 1 +value=SIG_ACS_CS +} +C 70200 46200 1 180 0 io-1.sym +{ +T 69300 46000 5 10 0 0 180 0 1 +net=IO:1 +T 70000 45600 5 10 0 0 180 0 1 +device=none +T 69300 46100 5 10 1 1 180 1 1 +value=SIG_GYRO_CS +} +C 69700 45700 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 70200 45800 70000 45800 1 0 0 +{ +T 70300 45700 5 10 0 0 0 0 1 +pinseq=1 +T 70300 45900 5 10 0 0 0 0 1 +pinnumber=1 +} +L 70000 45700 70000 45900 3 0 0 0 -1 -1 +T 69700 46100 8 10 0 0 0 0 1 +value=NoConnection +T 69950 45800 9 10 1 0 0 7 1 +NC +T 69700 46300 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69700 46500 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 46700 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 69700 46100 5 10 0 0 0 0 1 +value=NoConnection +T 69700 46500 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 64500 45300 1 180 0 out-1.sym +{ +T 64500 45000 5 10 0 0 180 0 1 +device=OUTPUT +T 63500 45100 5 10 1 1 0 0 1 +value=3V3 +} +C 64500 44100 1 180 0 out-1.sym +{ +T 64500 43800 5 10 0 0 180 0 1 +device=OUTPUT +T 63500 43900 5 10 1 1 0 0 1 +value=VIN +} +C 62500 45500 1 90 0 resistor-1.sym +{ +T 62100 45800 5 10 0 0 90 0 1 +device=RESISTOR +T 62200 45700 5 10 1 1 90 0 1 +refdes=R? +} +C 62200 46400 1 0 0 3.3V-plus-1.sym +C 62500 44500 1 90 0 switch-pushbutton-nc-1.sym +{ +T 62700 44050 5 10 0 0 90 0 1 +device=SWITCH_PUSHBUTTON_NC +T 62150 44900 5 10 1 1 90 0 1 +refdes=S? +} +N 62400 44300 62400 44500 4 +N 62400 45500 64500 45500 4 +N 64500 44300 62400 44300 4 +C 69700 48200 1 0 0 EMBEDDEDnc-left-1.sym +[ +P 70200 48300 70000 48300 1 0 0 +{ +T 70300 48200 5 10 0 0 0 0 1 +pinseq=1 +T 70300 48400 5 10 0 0 0 0 1 +pinnumber=1 +} +L 70000 48200 70000 48400 3 0 0 0 -1 -1 +T 69700 48600 8 10 0 0 0 0 1 +value=NoConnection +T 69950 48300 9 10 1 0 0 7 1 +NC +T 69700 48800 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69700 49000 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 49200 8 10 0 0 0 0 1 +graphical=1 +] +{ +T 69700 48600 5 10 0 0 0 0 1 +value=NoConnection +T 69700 49000 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 69700 47900 1 0 0 EMBEDDEDnc-left-1.sym +[ +L 70000 47900 70000 48100 3 0 0 0 -1 -1 +P 70200 48000 70000 48000 1 0 0 +{ +T 70300 48100 5 10 0 0 0 0 1 +pinnumber=1 +T 70300 47900 5 10 0 0 0 0 1 +pinseq=1 +} +T 69700 48900 8 10 0 0 0 0 1 +graphical=1 +T 69700 48700 8 10 0 0 0 0 1 +device=DRC_Directive +T 69700 48500 8 10 0 0 0 0 1 +documentation=nc.pdf +T 69950 48000 9 10 1 0 0 7 1 +NC +T 69700 48300 8 10 0 0 0 0 1 +value=NoConnection +] +{ +T 69700 48300 5 10 0 0 0 0 1 +value=NoConnection +T 69700 48700 5 10 0 0 0 0 1 +device=DRC_Directive +} +C 70200 47500 1 180 0 io-1.sym +{ +T 70000 46900 5 10 0 0 180 0 1 +device=none +T 69300 47400 5 10 1 1 180 1 1 +value=EN_DXLPWR +} +C 70200 47800 1 180 0 io-1.sym +{ +T 70000 47200 5 10 0 0 180 0 1 +device=none +T 69300 47700 5 10 1 1 180 1 1 +value=DIRECTION485 +} diff --git a/gyro.sch b/gyro.sch new file mode 100644 index 0000000..8dbab0a --- /dev/null +++ b/gyro.sch @@ -0,0 +1,164 @@ +v 20110115 2 +C 49000 43500 1 0 0 L3G4200D.sym +{ +T 49275 46750 5 10 0 0 0 0 1 +device=MAX485 +T 49275 45950 5 10 0 0 0 0 1 +footprint=so8 +T 49000 45650 5 10 1 1 0 0 1 +refdes=U? +} +C 48400 46600 1 90 0 capacitor-1.sym +{ +T 47700 46800 5 10 0 0 90 0 1 +device=CAPACITOR +T 48700 47000 5 10 1 1 180 0 1 +refdes=C? +T 47500 46800 5 10 0 0 90 0 1 +symversion=0.1 +T 48300 46600 5 10 1 1 0 0 1 +value=100nF +} +C 51000 47200 1 0 0 capacitor-1.sym +{ +T 51200 47900 5 10 0 0 0 0 1 +device=CAPACITOR +T 51300 47900 5 10 1 1 0 0 1 +refdes=C? +T 51200 48100 5 10 0 0 0 0 1 +symversion=0.1 +T 51200 47700 5 10 1 1 0 0 1 +value=10nF +} +C 50300 46400 1 0 0 capacitor-1.sym +{ +T 50500 47100 5 10 0 0 0 0 1 +device=CAPACITOR +T 50600 47100 5 10 1 1 0 0 1 +refdes=C? +T 50500 47300 5 10 0 0 0 0 1 +symversion=0.1 +T 50500 46900 5 10 1 1 0 0 1 +value=470nF +} +C 51700 46500 1 0 0 resistor-1.sym +{ +T 52000 46900 5 10 0 0 0 0 1 +device=RESISTOR +T 52000 47100 5 10 1 1 0 0 1 +refdes=R? +T 51900 46900 5 10 1 1 0 0 1 +value=10k +} +C 52400 42700 1 0 0 ground.sym +C 49300 46600 1 90 0 capacitor-1.sym +{ +T 48600 46800 5 10 0 0 90 0 1 +device=CAPACITOR +T 49600 47000 5 10 1 1 180 0 1 +refdes=C? +T 48400 46800 5 10 0 0 90 0 1 +symversion=0.1 +T 49700 46800 5 10 1 1 180 0 1 +value=10nF +} +C 49300 49200 1 180 0 ground.sym +N 46300 47400 46300 45000 4 +N 46300 45000 49000 45000 4 +N 50100 45900 50100 46300 4 +N 50100 46300 46300 46300 4 +N 49900 45900 49900 46300 4 +N 48200 46600 48200 46300 4 +N 49100 46600 49100 46300 4 +N 49100 47500 49100 48900 4 +N 51200 46600 51700 46600 4 +N 52600 43000 52600 48400 4 +N 52600 47400 51900 47400 4 +N 51000 47400 50300 47400 4 +N 50300 45900 50300 47400 4 +N 50500 46200 52600 46200 4 +N 50500 46200 50500 45900 4 +N 51400 45000 52600 45000 4 +N 51400 44800 52600 44800 4 +N 51400 44600 52600 44600 4 +N 51400 44400 52600 44400 4 +N 48200 48400 49100 48400 4 +N 48200 47500 48200 48400 4 +N 50500 43500 50500 43400 4 +N 50500 43400 52600 43400 4 +C 46100 47400 1 0 0 3.3V-plus-1.sym +C 50400 43000 1 90 0 nc-left-1.sym +{ +T 50000 43000 5 10 0 0 90 0 1 +value=NoConnection +T 49600 43000 5 10 0 0 90 0 1 +device=DRC_Directive +} +C 50200 43000 1 90 0 nc-left-1.sym +{ +T 49800 43000 5 10 0 0 90 0 1 +value=NoConnection +T 49400 43000 5 10 0 0 90 0 1 +device=DRC_Directive +} +N 49100 48400 52600 48400 4 +C 45400 43400 1 180 0 io-1.sym +{ +T 44500 43200 5 10 0 0 180 0 1 +net=IO:1 +T 45200 42800 5 10 0 0 180 0 1 +device=none +T 44500 43300 5 10 1 1 180 1 1 +value=SIG_GYRO_CS +} +C 45400 43900 1 180 0 io-1.sym +{ +T 44500 43700 5 10 0 0 180 0 1 +net=IO:1 +T 45200 43300 5 10 0 0 180 0 1 +device=none +T 44500 43800 5 10 1 1 180 1 1 +value=SIG_MISO +} +C 45400 44400 1 180 0 io-1.sym +{ +T 44500 44200 5 10 0 0 180 0 1 +net=IO:1 +T 45200 43800 5 10 0 0 180 0 1 +device=none +T 44500 44300 5 10 1 1 180 1 1 +value=SIG_MOSI +} +C 45400 44900 1 180 0 io-1.sym +{ +T 44500 44700 5 10 0 0 180 0 1 +net=IO:1 +T 45200 44300 5 10 0 0 180 0 1 +device=none +T 44500 44800 5 10 1 1 180 1 1 +value=SIG_SCK +} +N 45400 44800 49000 44800 4 +N 49000 44600 47100 44600 4 +N 47100 44600 47100 44300 4 +N 45400 43800 47900 43800 4 +N 47900 43800 47900 44400 4 +N 49000 44400 47900 44400 4 +N 45400 43300 49900 43300 4 +N 49900 43300 49900 43500 4 +N 47100 44300 45400 44300 4 +T 44800 44900 9 10 1 0 0 0 1 +clock serial +T 44800 44400 9 10 1 0 0 0 1 +SPI input/I2C data +T 44800 43900 9 10 1 0 0 0 1 +SPI output +T 44800 43400 9 10 1 0 0 0 1 +serial control +C 42400 41100 0 0 0 title-A4.sym +T 50900 41200 9 10 1 0 0 0 1 +Emílio D. Cantú +T 47100 41800 9 20 1 0 0 0 1 +Giroscópio +T 47000 41500 9 10 1 0 0 0 1 +gyro.sch diff --git a/pwrmotor.sch b/pwrmotor.sch new file mode 100644 index 0000000..8e3ffe2 --- /dev/null +++ b/pwrmotor.sch @@ -0,0 +1,90 @@ +v 20110115 2 +C 53300 45200 1 0 1 connector4-1.sym +{ +T 51500 46100 5 10 0 0 0 6 1 +device=CONNECTOR_4 +T 53300 46600 5 10 1 1 0 6 1 +refdes=CONN? +T 53300 45200 5 10 1 1 0 0 1 +value=5267-04A-X +} +N 51600 45700 50200 45700 4 +N 51600 45400 50900 45400 4 +N 50900 45400 50900 45200 4 +N 50900 45200 50200 45200 4 +N 51600 46000 51000 46000 4 +N 51000 46000 51000 47300 4 +C 51100 44500 1 0 0 ground.sym +N 51600 46300 51300 46300 4 +N 51300 46300 51300 44800 4 +C 45100 46700 1 180 0 io-1.sym +{ +T 44900 46100 5 10 0 0 180 0 1 +device=none +T 44200 46600 5 10 1 1 180 1 1 +value=EN_DXLPWR +} +C 46600 44500 1 0 0 ground.sym +N 46800 47300 51000 47300 4 +C 47700 47000 1 270 0 capacitor-2.sym +{ +T 48400 46800 5 10 0 0 270 0 1 +device=POLARIZED_CAPACITOR +T 48100 46700 5 10 1 1 0 0 1 +refdes=C? +T 48600 46800 5 10 0 0 270 0 1 +symversion=0.1 +T 48000 46300 5 10 1 1 0 0 1 +value=2200uF/25V +} +C 46600 48400 1 0 0 vdd-1.sym +T 46300 48800 9 10 1 0 0 0 1 +12 ~ 18.5 V +C 42900 41700 0 0 0 title-A4.sym +T 47500 42500 9 20 1 0 0 0 1 +Interface dos Motores +T 51400 41800 9 10 1 0 0 0 1 +Emílio D. Cantú +T 47400 42100 9 10 1 0 0 0 1 +pwrmotor.sch +C 50200 45300 1 180 0 io-1.sym +{ +T 50000 44700 5 10 0 0 180 0 1 +device=none +T 49300 45200 5 10 1 1 180 1 1 +value=D- +} +C 50200 45800 1 180 0 io-1.sym +{ +T 50000 45200 5 10 0 0 180 0 1 +device=none +T 49300 45700 5 10 1 1 180 1 1 +value=D+ +} +N 47900 47000 47900 47300 4 +C 46200 46100 1 0 0 npn-3.sym +{ +T 47100 46600 5 10 0 0 0 0 1 +device=NPN_TRANSISTOR +T 47100 46600 5 10 1 1 0 0 1 +refdes=Q? +} +N 46800 46100 46800 44800 4 +C 45300 46500 1 0 0 resistor-1.sym +{ +T 45600 46900 5 10 0 0 0 0 1 +device=RESISTOR +T 45500 46800 5 10 1 1 0 0 1 +refdes=R? +} +N 45100 46600 45300 46600 4 +C 46900 47500 1 90 0 resistor-1.sym +{ +T 46500 47800 5 10 0 0 90 0 1 +device=RESISTOR +T 46600 47700 5 10 1 1 90 0 1 +refdes=R? +} +N 46800 47500 46800 47100 4 +N 46800 45900 47900 45900 4 +N 47900 45900 47900 46100 4 diff --git a/symbols/L3G4200D.sym b/symbols/L3G4200D.sym new file mode 100644 index 0000000..332fe11 --- /dev/null +++ b/symbols/L3G4200D.sym @@ -0,0 +1,194 @@ +v 20110115 2 +B 300 300 1800 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +T 1575 2150 5 10 1 1 0 0 1 +device=L3G4200D +T 275 3050 5 10 0 0 0 0 1 +author=Emilio Cantu +T 275 3450 5 10 0 0 0 0 1 +numslots=0 +T 275 2850 5 10 0 0 0 0 1 +dist-license=GPL +T 275 2650 5 10 0 0 0 0 1 +use-license=unlimited +T 275 4250 5 10 0 0 0 0 1 +description=ultra-stable three-axis digital output gyroscope +T 275 4050 5 10 0 0 0 0 1 +documentation=http://www.st.com/web/en/resource/technical/document/datasheet/CD00265057.pdf +P 0 900 300 900 1 0 0 +{ +T 205 945 5 8 1 1 0 6 1 +pinnumber=4 +T 425 1075 5 8 0 1 0 8 1 +pinseq=4 +T 450 1075 5 8 0 1 0 2 1 +pintype=in +T 400 900 9 7 1 1 0 0 1 +pinlabel=SDO/SA0 +} +P 0 1100 300 1100 1 0 0 +{ +T 205 1145 5 8 1 1 0 6 1 +pinnumber=3 +T 425 1275 5 8 0 1 0 8 1 +pinseq=3 +T 450 1275 5 8 0 1 0 2 1 +pintype=io +T 400 1100 9 7 1 1 0 0 1 +pinlabel=SDA/SDI/SD0 +} +P 0 1500 300 1500 1 0 0 +{ +T 205 1545 5 8 1 1 0 6 1 +pinnumber=1 +T 425 1675 5 8 0 1 0 8 1 +pinseq=1 +T 450 1675 5 8 0 1 0 2 1 +pintype=pwr +T 400 1500 9 8 1 1 0 0 1 +pinlabel=Vcc1 +} +P 0 1300 300 1300 1 0 0 +{ +T 205 1345 5 8 1 1 0 6 1 +pinnumber=2 +T 200 1250 5 8 0 1 0 8 1 +pinseq=2 +T 350 1300 5 8 0 1 0 2 1 +pintype=clk +T 400 1300 9 8 1 1 0 0 1 +pinlabel=SCL/SPC +} +P 2400 900 2100 900 1 0 0 +{ +T 2195 945 5 8 1 1 0 0 1 +pinnumber=9 +T 1975 1075 5 8 0 1 0 2 1 +pinseq=9 +T 2070 895 9 8 1 1 0 6 1 +pinlabel=RES2 +T 1950 1075 5 8 0 1 0 8 1 +pintype=io +} +P 2400 1500 2100 1500 1 0 0 +{ +T 2195 1545 5 8 1 1 0 0 1 +pinnumber=12 +T 1975 1675 5 8 0 1 0 2 1 +pinseq=12 +T 2070 1520 9 8 1 1 0 6 1 +pinlabel=RES5 +T 1950 1675 5 8 0 1 0 8 1 +pintype=io +} +P 2400 1300 2100 1300 1 0 0 +{ +T 2195 1345 5 8 1 1 0 0 1 +pinnumber=11 +T 1975 1475 5 8 0 1 0 2 1 +pinseq=11 +T 2070 1320 9 8 1 1 0 6 1 +pinlabel=RES4 +T 1950 1475 5 8 0 1 0 8 1 +pintype=io +} +P 2400 1100 2100 1100 1 0 0 +{ +T 2195 1145 5 8 1 1 0 0 1 +pinnumber=10 +T 1975 1275 5 8 0 1 0 2 1 +pinseq=10 +T 2070 1120 9 8 1 1 0 6 1 +pinlabel=RES3 +T 1950 1275 5 8 0 1 0 8 1 +pintype=io +} +T 0 2150 8 10 1 1 0 0 1 +refdes=U? +P 900 0 900 300 1 0 0 +{ +T 850 205 5 8 1 1 90 6 1 +pinnumber=5 +T 1075 425 5 8 0 1 270 2 1 +pinseq=5 +T 900 355 9 8 1 1 90 0 1 +pinlabel=CS +T 1075 450 5 8 0 1 270 8 1 +pintype=io +} +P 1500 0 1500 300 1 0 0 +{ +T 1450 205 5 8 1 1 90 6 1 +pinnumber=8 +T 1675 425 5 8 0 1 270 2 1 +pinseq=8 +T 1500 355 9 8 1 1 90 0 1 +pinlabel=RES1 +T 1675 450 5 8 0 1 270 8 1 +pintype=io +} +P 1300 0 1300 300 1 0 0 +{ +T 1250 205 5 8 1 1 90 6 1 +pinnumber=7 +T 1475 425 5 8 0 1 270 2 1 +pinseq=7 +T 1300 355 9 8 1 1 90 0 1 +pinlabel=INT1 +T 1475 450 5 8 0 1 270 8 1 +pintype=io +} +P 1100 0 1100 300 1 0 0 +{ +T 1050 205 5 8 1 1 90 6 1 +pinnumber=6 +T 1275 425 5 8 0 1 270 2 1 +pinseq=6 +T 1100 355 9 7 1 1 90 0 1 +pinlabel=DRDY/INT2 +T 1275 450 5 8 0 1 270 8 1 +pintype=io +} +P 1500 2400 1500 2100 1 0 0 +{ +T 1450 2195 5 8 1 1 90 0 1 +pinnumber=13 +T 1325 1975 5 8 0 1 90 2 1 +pinseq=13 +T 1500 2045 9 8 1 1 90 6 1 +pinlabel=GND1 +T 1325 1950 5 8 0 1 90 8 1 +pintype=pwr +} +P 900 2400 900 2100 1 0 0 +{ +T 850 2195 5 8 1 1 90 0 1 +pinnumber=16 +T 725 1975 5 8 0 1 90 2 1 +pinseq=16 +T 900 2045 9 8 1 1 90 6 1 +pinlabel=Vcc2 +T 725 1950 5 8 0 1 90 8 1 +pintype=pwr +} +P 1100 2400 1100 2100 1 0 0 +{ +T 1050 2195 5 8 1 1 90 0 1 +pinnumber=15 +T 925 1975 5 8 0 1 90 2 1 +pinseq=15 +T 1100 2045 9 8 1 1 90 6 1 +pinlabel=RES6 +T 925 1950 5 8 0 1 90 8 1 +pintype=io +} +P 1300 2400 1300 2100 1 0 0 +{ +T 1250 2195 5 8 1 1 90 0 1 +pinnumber=14 +T 1125 1975 5 8 0 1 90 2 1 +pinseq=14 +T 1300 2045 9 8 1 1 90 6 1 +pinlabel=PLLFILT +T 1125 1950 5 8 0 1 90 8 1 +pintype=io +} diff --git a/symbols/LIS331DLH.sym b/symbols/LIS331DLH.sym new file mode 100644 index 0000000..2a322a7 --- /dev/null +++ b/symbols/LIS331DLH.sym @@ -0,0 +1,196 @@ +v 20110115 2 +B 300 300 1800 1800 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +T 1575 2150 5 10 1 1 0 0 1 +device=LIS331DLH +T 275 4350 5 10 0 0 0 0 1 +author=Emilio Cantu +T 275 2750 5 10 0 0 0 0 1 +numslots=0 +T 275 3950 5 10 0 0 0 0 1 +dist-license=GPL +T 275 3750 5 10 0 0 0 0 1 +use-license=unlimited +T 275 4750 5 10 0 0 0 0 1 +description=ultra low-power high performance 3-axes “nano” accelerometer +T 275 4950 5 10 0 0 0 0 1 +documentation=http://www.st.com/web/en/resource/technical/document/datasheet/CD00213470.pdf +P 0 900 300 900 1 0 0 +{ +T 205 945 5 8 1 1 0 6 1 +pinnumber=4 +T 425 1075 5 8 0 1 0 8 1 +pinseq=4 +T 450 1075 5 8 0 1 0 2 1 +pintype=clk +T 400 900 9 7 1 1 0 0 1 +pinlabel=SCL +} +P 0 1100 300 1100 1 0 0 +{ +T 205 1145 5 8 1 1 0 6 1 +pinnumber=3 +T 425 1275 5 8 0 1 0 8 1 +pinseq=3 +T 450 1275 5 8 0 1 0 2 1 +pintype=in +T 400 1100 9 7 1 1 0 0 1 +pinlabel=NC2 +} +P 0 1500 300 1500 1 0 0 +{ +T 205 1545 5 8 1 1 0 6 1 +pinnumber=1 +T 425 1675 5 8 0 1 0 8 1 +pinseq=1 +T 450 1675 5 8 0 1 0 2 1 +pintype=pwr +T 400 1500 9 8 1 1 0 0 1 +pinlabel=VCC1 +} +P 0 1300 300 1300 1 0 0 +{ +T 205 1345 5 8 1 1 0 6 1 +pinnumber=2 +T 200 1250 5 8 0 1 0 8 1 +pinseq=2 +T 350 1300 5 8 0 1 0 2 1 +pintype=pas +T 400 1300 9 8 1 1 0 0 1 +pinlabel=NC1 +} +P 2400 900 2100 900 1 0 0 +{ +T 2195 945 5 8 1 1 0 0 1 +pinnumber=9 +T 1975 1075 5 8 0 1 0 2 1 +pinseq=9 +T 2070 895 9 8 1 1 0 6 1 +pinlabel=INT2 +T 1950 1075 5 8 0 1 0 8 1 +pintype=io +} +P 2400 1500 2100 1500 1 0 0 +{ +T 2195 1545 5 8 1 1 0 0 1 +pinnumber=12 +T 1975 1675 5 8 0 1 0 2 1 +pinseq=12 +T 2070 1520 9 8 1 1 0 6 1 +pinlabel=GND2 +T 1950 1675 5 8 0 1 0 8 1 +pintype=pwr +} +P 2400 1300 2100 1300 1 0 0 +{ +T 2195 1345 5 8 1 1 0 0 1 +pinnumber=11 +T 1975 1475 5 8 0 1 0 2 1 +pinseq=11 +T 2070 1320 9 8 1 1 0 6 1 +pinlabel=INT1 +T 1950 1475 5 8 0 1 0 8 1 +pintype=io +} +P 2400 1100 2100 1100 1 0 0 +{ +T 2195 1145 5 8 1 1 0 0 1 +pinnumber=10 +T 1975 1275 5 8 0 1 0 2 1 +pinseq=10 +T 2070 1120 9 8 1 1 0 6 1 +pinlabel=RES1 +T 1950 1275 5 8 0 1 0 8 1 +pintype=io +} +T 0 2150 8 10 1 1 0 0 1 +refdes=U? +P 1100 0 1100 300 1 0 0 +{ +T 1050 205 5 8 1 1 90 6 1 +pinnumber=8 +T 1275 425 5 8 0 1 270 2 1 +pinseq=8 +T 1100 355 9 8 1 1 90 0 1 +pinlabel=CS +T 1275 450 5 8 0 1 270 8 1 +pintype=io +} +P 1300 0 1300 300 1 0 0 +{ +T 1250 205 5 8 1 1 90 6 1 +pinnumber=7 +T 1475 425 5 8 0 1 270 2 1 +pinseq=7 +T 1300 355 9 8 1 1 90 0 1 +pinlabel=SDO/SA0 +T 1475 450 5 8 0 1 270 8 1 +pintype=io +} +P 900 0 900 300 1 0 0 +{ +T 850 205 5 8 1 1 90 6 1 +pinnumber=6 +T 1075 425 5 8 0 1 270 2 1 +pinseq=6 +T 900 355 9 7 1 1 90 0 1 +pinlabel=SDA/SDI/SDO +T 1075 450 5 8 0 1 270 8 1 +pintype=io +} +P 1500 2400 1500 2100 1 0 0 +{ +T 1450 2195 5 8 1 1 90 0 1 +pinnumber=13 +T 1325 1975 5 8 0 1 90 2 1 +pinseq=13 +T 1500 2045 9 8 1 1 90 6 1 +pinlabel=GND3 +T 1325 1950 5 8 0 1 90 8 1 +pintype=pwr +} +P 900 2400 900 2100 1 0 0 +{ +T 850 2195 5 8 1 1 90 0 1 +pinnumber=15 +T 725 1975 5 8 0 1 90 2 1 +pinseq=15 +T 900 2045 9 8 1 1 90 6 1 +pinlabel=RES2 +T 725 1950 5 8 0 1 90 8 1 +pintype=io +} +P 1100 2400 1100 2100 1 0 0 +{ +T 1050 2195 5 8 1 1 90 0 1 +pinnumber=14 +T 925 1975 5 8 0 1 90 2 1 +pinseq=14 +T 1100 2045 9 8 1 1 90 6 1 +pinlabel=VCC2 +T 925 1950 5 8 0 1 90 8 1 +pintype=io +} +P 1500 0 1500 300 1 0 0 +{ +T 1500 355 9 8 1 1 90 0 1 +pinlabel=GND1 +T 1450 205 5 8 1 1 90 6 1 +pinnumber=5 +T 1675 425 5 8 0 1 270 2 1 +pinseq=5 +T 1675 450 5 8 0 1 270 8 1 +pintype=pwr +} +T 400 800 9 7 1 1 0 0 1 +pinlabel=SPC +P 1300 2400 1300 2100 1 0 0 +{ +T 1300 2045 9 8 1 1 90 6 1 +pinlabel=GND4 +T 1250 2195 5 8 1 1 90 0 1 +pinnumber=16 +T 1125 1975 5 8 0 1 90 2 1 +pinseq=16 +T 1125 1950 5 8 0 1 90 8 1 +pintype=pwr +} diff --git a/symbols/MAX3485.sym b/symbols/MAX3485.sym new file mode 100644 index 0000000..fcc70be --- /dev/null +++ b/symbols/MAX3485.sym @@ -0,0 +1,134 @@ +v 20110115 2 +B 300 0 1000 1100 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +T 275 1150 5 10 1 1 0 0 1 +device=MAX3485 +T 1200 1150 8 10 1 1 0 0 1 +refdes=U? +T 275 2450 5 10 0 0 0 0 1 +footprint=so8 +T 275 1850 5 10 0 0 0 0 1 +author=Anton Dubniak +T 275 2250 5 10 0 0 0 0 1 +numslots=0 +T 275 1650 5 10 0 0 0 0 1 +dist-license=GPL +T 275 1450 5 10 0 0 0 0 1 +use-license=unlimited +T 275 3050 5 10 0 0 0 0 1 +description=Low-Power, Half-Duplex RS-485 Transceiver +T 275 2850 5 10 0 0 0 0 1 +documentation=http://datasheets.maxim-ic.com/en/ds/MAX1487-MAX491.pdf +P 0 200 300 200 1 0 0 +{ +T 205 245 5 8 1 1 0 6 1 +pinnumber=4 +T 425 375 5 8 0 1 0 8 1 +pinseq=4 +T 330 220 9 8 1 1 0 0 1 +pinlabel=DI +T 450 375 5 8 0 1 0 2 1 +pintype=in +} +P 0 400 300 400 1 0 0 +{ +T 205 445 5 8 1 1 0 6 1 +pinnumber=3 +T 425 575 5 8 0 1 0 8 1 +pinseq=3 +T 330 420 9 8 1 1 0 0 1 +pinlabel=DE +T 450 575 5 8 0 1 0 2 1 +pintype=in +} +L 675 200 525 75 3 0 0 0 -1 -1 +L 675 200 525 325 3 0 0 0 -1 -1 +L 525 200 300 200 3 0 0 0 -1 -1 +L 525 75 525 325 3 0 0 0 -1 -1 +L 300 400 600 400 3 0 0 0 -1 -1 +L 600 400 600 275 3 0 0 0 -1 -1 +V 650 250 25 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +L 675 675 675 925 3 0 0 0 -1 -1 +L 525 800 675 675 3 0 0 0 -1 -1 +L 525 800 675 925 3 0 0 0 -1 -1 +V 700 725 25 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +P 0 800 300 800 1 0 0 +{ +T 205 845 5 8 1 1 0 6 1 +pinnumber=1 +T 425 975 5 8 0 1 0 8 1 +pinseq=1 +T 330 820 9 8 1 1 0 0 1 +pinlabel=RO +T 450 975 5 8 0 1 0 2 1 +pintype=out +} +P 0 600 200 600 1 0 0 +{ +T 205 645 5 8 1 1 0 6 1 +pinnumber=2 +T 200 550 5 8 0 1 0 8 1 +pinseq=2 +T 330 620 9 8 1 1 0 0 1 +pinlabel=\_RE\_ +T 350 600 5 8 0 1 0 2 1 +pintype=in +} +V 250 600 50 6 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +L 675 250 800 250 3 0 0 0 -1 -1 +L 800 250 800 725 3 0 0 0 -1 -1 +L 725 725 800 725 3 0 0 0 -1 -1 +L 600 125 925 125 3 0 0 0 -1 -1 +L 925 125 925 875 3 0 0 0 -1 -1 +L 675 875 925 875 3 0 0 0 -1 -1 +L 525 800 300 800 3 0 0 0 -1 -1 +V 600 700 25 3 0 0 0 -1 -1 0 -1 -1 -1 -1 -1 +L 300 600 600 600 3 0 0 0 -1 -1 +L 600 600 600 675 3 0 0 0 -1 -1 +P 1600 200 1300 200 1 0 0 +{ +T 1395 245 5 8 1 1 0 0 1 +pinnumber=5 +T 1175 375 5 8 0 1 0 2 1 +pinseq=5 +T 1270 195 9 8 1 1 0 6 1 +pinlabel=GND +T 1150 375 5 8 0 1 0 8 1 +pintype=pwr +} +P 1600 800 1300 800 1 0 0 +{ +T 1395 845 5 8 1 1 0 0 1 +pinnumber=8 +T 1175 975 5 8 0 1 0 2 1 +pinseq=8 +T 1270 820 9 8 1 1 0 6 1 +pinlabel=Vcc +T 1150 975 5 8 0 1 0 8 1 +pintype=pwr +} +P 1600 600 1300 600 1 0 0 +{ +T 1395 645 5 8 1 1 0 0 1 +pinnumber=7 +T 1175 775 5 8 0 1 0 2 1 +pinseq=7 +T 1270 620 9 8 1 1 0 6 1 +pinlabel=B +T 1150 775 5 8 0 1 0 8 1 +pintype=io +} +P 1600 400 1300 400 1 0 0 +{ +T 1395 445 5 8 1 1 0 0 1 +pinnumber=6 +T 1175 575 5 8 0 1 0 2 1 +pinseq=6 +T 1270 420 9 8 1 1 0 6 1 +pinlabel=A +T 1150 575 5 8 0 1 0 8 1 +pintype=io +} +L 1300 600 800 600 3 0 0 0 -1 -1 +L 1300 400 925 400 3 0 0 0 -1 -1 +V 800 600 25 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1 +V 925 400 25 3 0 0 0 -1 -1 1 -1 -1 -1 -1 -1